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IR Slashes GaN Manufacturing Costs

GaN power devices are smaller and more efficient than equivalents made from silicon. But significant commercial success will only follow when their manufacturing costs fall, a goal that can be realized by turning to production on 150 mm silicon CMOS processing lines, writes Michael Briere on behalf of International Rectifier.

There is a downside to the rising standard of living throughout the world: increased energy consumption. This is expected to go up by more than one third over the next twenty years, according to the US Energy Information Association.

But it doesn’t have to be like this, because there are many ways to reduce the amount of energy needed to power applications. One opportunity is to introduce electric motors into transportation, to either replace or work in tandem with an internal combustion engine. This can deliver energy savings of 60 percent.

Similarly, it is possible to slash the power consumption of consumer appliances by 50 percent by replacing AC induction motors with inverter-driven, permanent magnet motors. And energy savings can also result from switching to electronic-ballasted forms of lighting and improvements in the delivery of electronic loads, especially for the growing IT infrastructure.

Grasp all these energy saving opportunities and global energy consumption could plummet by a quarter, trimming $2 trillion off of the world’s annual electricity bill (assuming that a barrel of oil costs $45). It is a staggering financial saving, which dwarfs the globe’s yearly spend on power electronics, $50 billion.

These energy savings can be realized by substantial, optimized and intelligent power electronics for driving various loads. In principle, this form of power electronics is already available, but it could take another decade before prices fall far enough for consumers to buy products incorporating this technology for reducing global energy consumption.

One way to speed this adoption is to increase the performance of modern power electronics, while cutting its cost. Power-converter sub-systems offer the most fertile ground for the uptake of this technology, and improvements have already enabled increasingly dense and efficient working loads.

Employing these power conversion systems is most attractive when they combine affordability with efficient handling of dense loads. The last 40 years has witnessed significant improvements in these three attributes – density, efficiency and cost – gains that have arguably been dominated by refinements in the power devices that they use. Similarly, manufacture of a radically improved power switch could spur a revolution in power electronic architectures and systems.

At International Rectifier we have been developing a technology capable of delivering this step-change: the GaNpowIR platform. Here GaN-on-silicon epitaxy is combined with device fabrication processing on 150 mm substrates, using a standard, modern, silicon CMOS manufacturing line that has been subjected to little modification to equipment or process discipline.

Displacing the silicon incumbent

Commercial success demands taking market share from the incumbent technology, the silicon power FET. This device has been serving customers for 30 years, and has enabled widespread adoption of switch-mode power supplies. These have surpassed the linear regulator as the dominant power architecture. Alongside the power FET, another mainstay of the power electronics market is the silicon-based IGBT, which combines the ease of charge control with the benefits of conductivity modulated drift resistivity. This is often selected for lower frequency conversion systems such as motor drivers.

Significant engineering efforts over the last three decades have driven substantial progress in the performance of both of these devices – figures of merit have improved by an order of magnitude. But wringing out any further gains in performance is going to be tough and costly. It is likely that efforts could yield an economically feasible factor-oftwo improvement in the 30 V FET, and a five-fold gain in 600 – 1200 V silicon IGBTs. But any further advances in power device performance for future electronic loads will need new material technologies, such as gallium nitride. Turning to this wide bandgap semiconductor is very attractive because it also enables a 50 to 90 percent reduction in both the size and the weight of conversion subsystems, thanks to a massive cut in cooling system requirements.

Although the first GaN HEMT transistor was invented more than 15 years ago by Asif Khan, significant development efforts on practical power devices employing GaN-on silicon technology are fairly recent. Tremendous progress in this technology is expected over the next 10- 20 years, and in just five years figures of merit could improve by an order of magnitude.

Despite all this promise, GaN devices are generally failing to fulfill their commercial potential. That’s because they are too expensive to produce, due to the costs associated with substrates, epitaxy, device fabrication, packaging, support electronics and development. The power device marketplace has set a viable, economic-based limit of about $ 3/cm2 for substrate and epitaxy costs, restricting the choice of substrates to just silicon. Multi-wafer MOCVD tools are essential for providing the required throughput and an acceptable cost-of-ownership, although their current status is quite primitive compared to modern silicon processing equipment.

In addition to realizing low costs for substrates and epitaxial layers, it is imperative to minimize device fabrication costs. To do this, manufacture should employ substrates at least 150 mm in diameter. Selecting such platforms has an additional, significant benefit - widespread availability.

Fabrication of compound semiconductor devices often involves specialized processes such as e-beam and lift-off lithography, and may also include gold metallization steps. Products for military and RF applications can justify the inclusion of these expensive techniques, because the market is willing to accept costs of more than $ 10,000 for finished 100 mm wafers for discrete devices. But these manufacturing costs are incompatible with the far broader power device market.

If  power devices based on wide bandgap materials are to displace the incumbents, they must have comparable fabrication costs. Realizing this is only possible by manufacturing devices in volumes comparable to that of silicon devices. In other words, a production throughput of at least 10,000 wafers every week. These volumes must be produced with high yields, using silicon-compatible semiconductor fabrication lines, taking advantage of the current high volume of silicon demand. If these goals are fulfilled, it is possible to tap into today’s broad market for power devices that equates to 10 million, 150 mm wafers per year. Success requires significant scalability in device manufacture, but this is easy to accomplish with existing silicon device fabrication facilities and silicon substrates.

We are adopting all of these measures and using our GaNpowIR platform to manufacture power devices delivering an incredibly high level of performance for their price. By outperforming silicon equivalents in this metric, we are starting to drive market penetration of GaN-onsilicon power devices.

Taking the strain

One of the biggest hurdles to commercialization is the development of cost-effective, high-yield, high-throughput epitaxial processes that are applicable to large diameter silicon wafers. The growth process must address intrinsic mismatches in both the lattice constant and the thermal coefficient of expansion of silicon and GaN. Failure to do this leads to many threading dislocations, plus significant macroscopic film stresses that result in excessive wafer bow and cracking of the film.

Our proprietary film growth process addresses these issues and produces high-quality epitaxial films on 150 mm silicon (111) substrates with a standard thickness of 625 μm. Threading dislocations are significantly reduced, and the dislocation density of 109 cm-2 in our 2 μm-thick silicon layer predominantly results from edge dislocations. The low density of dislocations, which is comparable to that of GaN films of a similar thickness on SiC, leads to high mobility. Hall mobility measurements indicate that the mobility in the two-dimensional electron gas formed at the interface between the thick GaN buffer layer and the overlying AlGaN barrier layer is often higher than 2000 cm2/Vs (see figure 1).

 



Figure 1: IR’s GaN-on-silicon epitaxial process produces HEMTs with a twodimensional electron gas Hall mobility typically exceeding 2000 cm2/Vs

 

High yield manufacturing demands relatively flat wafers for processing lines. The bow of our wafers with 2 μm of epitaxy is less than 20 μm (3 sigma), well below the 60 μm limit for device fabrication (see Figure 2). Many devices can be produced from each wafer, because we can consistently produce truly crack-free material to within 0.5 mm of the wafer edge.



Figure 2: The wafer bow in the 150 mm, GaN-on-silicon epiwafers is well below 60 μm, the upper limit for high-volume processing

Many GaN devices developed to date suffer from a high leakage current, which stems from the Schottky gates. This leakage - of the order of mA per mm of gate width – is too high for power devices, which typically have an effective gate width of 1 m or so. Such a high leakage causes unacceptable power loss and heating. We have driven leakage currents below 1 μA/mm by employing a proprietary insulated gate construction and very high quality III-N films. This can lead to gate and drain-source leakages of just 10 pA/mm (see Figure 3)

 



Figure 3: A proprietary insulated gate reduces the reverse-bias drain-leakage current in IR’s GaNpowIR devices with a gate length of 0.3 μm. The HEMTs, which have gate-source and gate-drain spacings of 1 μm, exhibit a punchthrough limited, source-drain breakdown of more than 40 V for a gate voltage of -20V

One of the strengths of our devices is their high level of ruggedness in their intended application, initially 12 V to 1 V buck regulators (see Figure 4). The forward-biased, safe operating area for this low voltage power device far exceeds the requirements of the application. These 850 mm gate-width devices have an Ion/Ioff ratio exceeding 1010, which is substantially better than that reported elsewhere for GaN-based devices. Ion/Ioff ratios of more than 108 are routinely achieved for 600 V devices, where Ioff is measured at 600 V.

 



Figure 4: IR’s GaN-based power devices intended for 12 Vin power conversion applications have a large safe operating area under forward bias.

A major challenge facing GaN power device manufacturers is the realization of a sufficiently low and controllable source-drain contact resistance. Although this resistance has negligible impact on the overall drainsource resistance of devices operating at 300 V or more, it can play a domineering role in HEMTs operating below 100 V, degrading device performance. In order for these types of devices to be competitive, the contact resistance must consistently be below 0.35 Ω mm. To meet this requirement, we have developed a process compatible with cost-effective, high volume manufacturing that does not involve gold metallurgy.

 



Figure 5: A low contact resistance, which was measured using a standard transmission line technique, ensures high performance for GaN-based power devices operating at relatively low voltages

 

Commercially viable, low-voltage GaN devices must also realize effective conduction of the source-drain current from the internal to the external device terminals. We have satisfied this requirement with planarized multi-level metallization, common to silicon ULSI device fabrication. Turning to proprietary, solderable front metallurgy enables production of flip-chip die. This eliminates wire bonding and minimizes other package-related parasitics.

Commercial targets

Profitable manufacturing of large-area power devices requires high yields. In our opinion yields for devices 10 mm2 in size must exceed 80 percent, a target that we have achieved with our GaNpowIR platform. Such a yield also demonstrates the maturity of our production process.

The other prerequisite to commercialization is the creation of a device with a stable in-circuit performance. The critical figure-of-merit is the drain-source resistance of the device in its “on" state. This shows excellent stability in tests involving accelerated aging (see figure 6). Performance is comparable to that of silicon devices, according to reliability testing over 3 million device-hours.

 



Figure 6: The room-temperature drain-source resistance of IR’s power device in its on-state has a high degree of stability over time. Devices with 0.3 μm-long gates with a width of 2.6 m were stressed at 150 °C. Gate and drain-source voltages were –7V and 15 V, respectively

Other aspects of the device also meet the need for robustness. The gate dielectric shows excellent stability under extreme, accelerated stress conditions (see figure 7); the drain leakage current does not significantly degrade over time; and no physical degradation is observed in the AlGaN barrier layer at the gate edge after several thousand hours of operation. This barrier benefits from the significantly reduced gate leakage currents resulting from the incorporation of a dielectric at the gate.

 



Figure 7: Room temperature gates leakage currents are relatively low and stable, according to tests at -50 V applied to the 8.5 V rated gates. The devices had 0.3 μm long gates with a width of 2.6 m, and stress was performed at 150oC

 

This strong set of characteristics gives these devices a great opportunity to help to make cost-effective, significant energy savings in various ways. Customers buying our products manufactured on the GaNpowIR platform can rest assured that they are reliable, stable, and can be produced in high enough volumes to keep pace with demand.

Further reading

A. Lidow, APEC 2005 Planery Talk and Briere, M.A., S2k Conference 2005

M.A. Briere, Proceedings of PCIM Europe 2009 and Briere, M.A., Power Electronics Europe 7, October / November (2008) 29-31

Ikeda et.al. ISPSD (2008) 289

A. Nakagawa, ISPSD (2006) 1
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