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Unravelling The Mysteries Of HEMT Degradation

Widely used temperature-accelerated tests can overestimate the lifetime of GaN HEMTs. That’s because they fail to account for device failure mechanisms below the critical voltage that degrade the gate and lead to a surge in leakage current, says imec’s Denis Marcon, Thomas Kauerauf and Stefaan Decoutere.


The pairing of GaN and AlGaN creates HEMTs that are renowned for high current densities, high operating voltages and great performance over a wide frequency range. But this great set of attributes is of little practical benefit unless it can yield products with a guarantee of long-term reliability. Unfortunately, assessing whether this is the case in nitride HEMTs is far from straightforward, given the limited understanding of the degradation mechanisms of this device, plus the great deal of uncertainty relating to the handles that can slash testing times and are known as the accelerator factors.

The so-called three-temperature life test is the conventional approach for qualifying AlGaN/GaN HEMT reliability. A device population is stressed at three different (junction) temperatures, using the operating DC or RF bias conditions, and transistor failure is normally defined by the time it takes for the drain output current or power to fall by 10 or 15 percent.

It is possible to then extract the expected mean time to failure (MTTF) for a defined operating (junction) temperature, by first calculating the MTTF from the set of devices at each temperature. Such an approach often employs the Arrhenius law, which states that the device lifetime is inversely proportional to the exponential of its temperature.

Three-temperature life tests often yield lifetimes in excess of 100 years, indicating that AlGaN/GaN HEMTs have excellent reliability. But that is an incredibly optimistic view – it is certainly not the case that all the degradation mechanisms are strongly temperature-accelerated. The reality is that there are some failure mechanisms that are not brought to light with the three-temperature life test, and these could cause the device to fail far faster than the 100-year estimate.

Stressing the devices

Recently, researchers from various institutions have shown that the increase in HEMT gate leakage current that results from high electric fields can rapidly reduce device lifetimes. Many researchers within the nitride community are blaming this premature ageing on defect generation below the gate edge located in the AlGaN barrier. This form of device ageing is normally studied by a step-stress test that involves ramping up the operating voltage. That’s because one of the most accepted degradation mechanisms is based on the inverse piezoelectric effect, which is electric field dependent. It is believed that defects form in the AlGaN layer when its elastic energy exceeds a critical value.

One insight provided by step-stress experiments is the identification of the so-called critical voltage (VCRITICAL). Increase the bias beyond this value and the elastic energy in the AlGaN layer exceeds the critical value, leading to the formation of defects that cause a hike in gate leakage current. According to this theory, devices operating at voltages below |VCRITICAL| should never show any degradation.

It is possible to perform step stress tests in the off-state while stepping up the drain voltage (an off-state stepstress), or by reverse-biasing the gate while drain and source are grounded (a reverse-gate-bias step-stress). In both tests the failure mode – a sudden increase of the leakage current at VCRITICAL – is the same, but a reverse gate bias step stress avoids side effects such as punchthrough or buffer leakage. However, since the gate tends to be closer to the source than the drain, reverse biasing often induces more severe degradation on the gate-edge on the source side, which is where the electric field peaks.

At imec, a European research institute based in Belgium, we have found this to be the case in RF GaN HEMTs fabricated with a gate-source spacing of 0.7 μm and a gate drain separation of 6 μm (Figure 1). The value of VCRITICAL for these transistors is –70 V, which is remarkably high for a HEMT with a gate-source distance of only 0.7 μm. Far more noteworthy than that, however, is that in clear contrast to common understanding, we observe degradation of our HEMTs when they are stressed below VCRITICAL at a constant voltage (Figure 2a).

Figure 1: Device geometries and schematic structure of the Al0.3Ga0.7N/GaN epilayer grown on highly resistive 4-inch silicon (111) substrate used in this study. The inset shows the TEM image of the embedded Ni/Au based T-gate


Figure 2: (a) A time-dependent breakdown experiment performed at VG = -65 V and VD = VS = 0 V. After some time the gate leakage current suddenly increases. The first current jump is indicated at time-tobreakdown (tBD); the inset shows the emission microscopy image of the device bias at VG= –65 V, VD = VS =0 V, before and after failure. (b) The tBD relative to the reverse gate bias conditions used during the stress. The dashed line is only a guide for the eye


Our device failure is associated with a surge in gate leakage current (Figure 2a) and resembles oxide degradation and breakdown in CMOS technology. Oxide breakdown in these silicon structures stems from the random formation of localized, preferential leakage paths. This has been observed in emission microscopy images that expose regions with anomalously large current injection: after oxide breakdown, hot spots are seen where the leakage path was formed.

We have observed the same phenomenon in our nitride HEMTs: after stress the device exhibits localized hotspots that are formed randomly along the gate width (see inset to Figure 2a). These were not there before stress, clearly indicating that the degradation is caused by the random formation of localized leakage paths. The nature of these paths remains a mystery.

The high degree of similarity between silicon transistors undergoing oxide breakdown and the failure mechanism in our HEMTs operating at voltages below VCRITICAL led us to apply the measurement procedures extensively developed in CMOS to our devices. Following this methodology, we performed time dependent breakdown (TDB) experiments at room temperature for three stress voltage levels (VG = –65 V, –60 V and –55 V) in a population of 48 devices – 16 devices per voltage group. One characteristic that we have studied is the time that has elapsed before the first gate current jump.

This time-to-breakdown (tBD) depends of the degree of stress, indicating that gate degradation has a strong bias and hence electric field dependence (see Figure 1 b).

A greater insight into device failure can be garnered by looking at the distribution of tBD. Mirroring oxide degradation, our HEMTs time-to-breakdown follows the Weibull law (Figure 3a). Fitting data with this law requires a shape parameter, β, plus a value of η, which represents tBD in 63.2 percent of the device population, for each stress voltage. Once the η-values have been obtained, extrapolation can yield values of tBD towards lower voltages at an arbitrary failure level.

For example, we have calculated that an operating voltage of 27 V, corresponding to 38 percent of VCRITICAL, guarantees that just 1 percent of the device population fails after being driven for 20 years at room temperature (Figure 3b). To arrive at this conclusion, we extrapolated with a power law model, because this provides the best fit to our data.

Getting warmer

We have also studied the effects of the operating temperature on device reliability, by comparing the gate degradation of three sets of 16 devices at 298 K, at 398 K and at 473 K. In each case, the gate voltage was fixed to –55 V. We adopted the same methodology used to study our devices at room temperature and found that the η values extracted from each set of HEMTs follow the Arrhenius law with an activation energy as small as 0.12 eV (Figure 4a). Our conclusion: gate degradation has weak temperature dependence. One key consequence of this finding is that any temperatureaccelerated test, including the widely used threetemperature life test, can fail to highlight gate degradation phenomenon. That’s because temperature, rather than voltage, is used as the accelerator factor. Our work shows that a high-temperature stress that leads to no gate failures after thousands of hours cannot guarantee that there will be no gate degradation within 20 years. A standard temperature-accelerated test only shows that the applied voltage stress is not high enough to observe gate degradation within the stress time.

We have repeated our time-to-breakdown experiments at an ambient temperature of 200 °C with gate stress voltages of –60 V, –55 V and –50 V. Again, when performing lifetime extraction, we found that the power law model provides a good fit to our experimental data (Figure 4b). In this case, an operating voltage of 22 V that corresponds to 31 percent of VCRITICAL guarantees a 20 year lifetime at 200 °C with 1 percent failure level. This lifetime applies to a device with a 0.7 μm gate to drain distance. Since breakdown voltage scales with this distance, increasing the separation of gate and drain to 4 μm guarantees a failure rate of just 1 percent for HEMTs operating at 70 V and 200 °C for 20 years. Interestingly, lifetime extrapolation curves at room temperature are not parallel to those at 200 °C, implying that gate degradation exhibits different activation energies at each bias point. In other words, it is not possible to extract the device lifetime for any arbitrary temperature by just using the Arrhenius equation and the lifetime extraction from time-to-breakdown measurements performed at fixed temperature. The major consequence of this finding is that in order to avoid extrapolation errors, time-to-breakdown experiments should be performed at the targeted temperature. By taking this approach, which is conventionally used in the CMOS industry, temperature effects are intrinsically included in the failure data. Although the nature of gate degradation is unclear, it is possible that the root cause is the well-studied and documented inverse piezoelectric effect. In this scenario, additional strain induced in the AlGaN layer during application of the bias condition would determine the rate of defect generation. Nevertheless, it is possible that an alternative and not yet known phenomena might be behind the time depended gate degradation. Further investigation is required.


Figure 3: (a) Weibull plot of the time-to-breakdown (tBD) distributions for three time-dependent breakdown gate voltage conditions (–55 V, –60 V and –65 V). (b) Extrapolation of the tBD at 298 K towards low-bias conditions. After scaling to 1 percent, at 20 years an approximated operating voltage of 27 V (corresponding to 38 percent of VCRITICAL) can be determined. A power law with exponent n=27 fits best the data


Figure 4: (a) Arrhenius relation of the tBD on 63.2 percent of the population (η of the Weibull distributions). The activation energy is 0.12 eV. (b) Extrapolation of the tBD towards low bias conditions at 298 K (black) and at 437 K (red). After scaling to 1 percent, at 20 years and 473 K an approximated operating voltage of 22 V (corresponding to 31 percent of VCRITICAL) can be determined. A power law with exponent n=21 fits best the data measured at 473K


What is abundantly clear is that the increase in gate leakage below the critical voltage, which leads to performance degradation and eventual device breakdown, is a very important reliability issue for AlGaN/GaN HEMTs. It is not exposed by conventional reliability approaches based on temperature-accelerated tests, but the pace that it proceeds does depend on the applied bias. So in our opinion a comprehensive reliability evaluation must include voltage-accelerated, timedependent breakdown experiments at the targeted temperature to correctly assess gate degradation phenomenon and ultimately provide a reliable prediction of HEMT lifetimes.


imec is renowned for being equipped with state-ofthe- art processing tools


Researchers at imec have found that nitride HEMTs exhibit an increase in gate leakage below the critical voltage, which leads to performance degradation and eventual device breakdown


GaN reliability studies were undertaken at imec, a world-leading research institute in nanoelectronics and nanotechnology with more than 1,850 staff

© 2011 Angel Business Communications. Permission required.


D. Marcon et al. Proc of IEEE International Electron Devices Meeting 472 (2010)

R. Degraeve et al. Microelectronics Reliability 39 1445 (1999)

G. Meneghesso et al. Int. J. Microwave Wireless Technology 2 39 (2010)

J. A. del Alamo et al. Microelectronics reliability 49 1200 (2009)
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