Intel and IQE present papers at IEDM
The three joint papers demonstrating the benefits of III-V compound semiconductors were presented at the conference in Washington DC on 7 December 2011.
Intel Corporation and IQE plc yesterday presented a series of joint papers on recent key developments in compound semiconductor device technologies at the International Electron Devices Meeting (IEDM) in Washington, DC.
The first paper was entitled "Electrostatics Improvement in 3-D Tri-gate Over Ultra-Thin Body Planar InGaAs Quantum Well Field Effect Transistors with High-K Gate Dielectric and Scaled Gate-to-Drain/Gate-to-Source Separation". Presented by M. Radosavljevic from Intel, the research demonstrated, what is claimed, for the first time 3-D Tri-gate InGaAs devices with significantly improved electrostatic parameters compared with equivalent ultra-thin planar devices. The research presented shows that the 3-D Tri-gate architecture is an effective way to improve the scalability of III-V FETs for future low power logic applications.
The second paper, "Fabrication, Characterization, and Physics of III-V Heterojunction Tunnelling Field Effect Transistors (H-TFET) for Steep Sub-Threshold Swing" presented by Gilbert Dewey from Intel, demonstrated one of the steepest subthreshold swing (SS < 60 mV/decade) ever reported in a III-V Tunnelling Field Effect Transistor (TFET) by using thin gate oxide, heterojunction engineering and high source doping. The overall TFET device performance is improved compared with homojunction TFETs due to the decreased source-to-channel tunnel barrier height.
The third paper; "MOVPE III-V Material Growth on Silicon Substrates and its Comparison to MBE for Future High Performance and Low Power Logic Applications" presented by Niloy Mukherjee from Intel, demonstrated that the material quality of MOVPE III-V QWFET structures on silicon can be matched to that of the best MBE III-V QWFET structures on silicon, using 75mm diameter silicon substrates. The research presented suggests that MOVPE can be a promising technique for III-V material growth on silicon substrates for future logic device applications.
Established in 1955, the IEDM is the world's premier forum for reporting breakthroughs in technology, design, manufacturing, physics and the modelling of semiconductors and other electronic devices. Proceedings of the conference are published by the IEEE.