Silicon-on-sapphire; Rising Value In Next-generation Wireless Networks
Introductions of new wireless communication standards are forcing makers of RF Front End components to build products with higher linearity. Silicon-on-sapphire devices excel in this area and, thanks to our UltraCMOS process and accelerated roadmap, the performancegap is expected to continue to grow, versus known competitive technologies such as GaAs, says Rodd Novak from Peregrine Semiconductor Corporation.
Operators of wireless networks continually strive for higher efficiencies, faster data rates and lower latency. Their quest leads them to introduce new schemes for data transmission. One of the most recent is the 4G Long Term Evolution (LTE) mobile communications standard, which is gaining widespread adoption around the world. A significant proportion of US operators have rapidly deployed the LTE standard, and those in Europe, China, and the rest of the world are not far behind.
The introduction of a 4G LTE network brings with it a number of technical challenges that impact many of the RF Front End (RFFE) components in User Equipment (UE), such as Power Amplifiers (PAs), filters, antennas, and switches. Adjustments and improvements in these components are needed in order to deliver smaller, more integrated RFFEs that have the high isolation and high linearity needed to keep pace with advances in UE and the supporting infrastructure.
It is possible to address all of these requirements with legacy compound semiconductor technologies. However, there is an alternative. The Silicon-on-Sapphire (SOS) process—an advanced form of Silicon-on-Insulator (SOI) technology—enables RFFE components with the scalable integration, consistent performance, and benefits of the most widely used semiconductor technology—CMOS. Additionally, the SOS process allows RF performance equal to or better than GaAs.
Peregrine manufacturers its switches using silicon-on-sapphire technology.
At Peregrine Semiconductor of San Diego, CA, we have a patented SOS technology—UltraCMOS— that is an advanced form of the SOI process. UltraCMOS technology involves the formation of a thin layer of silicon on a sapphire wafer. This foundation appeals to IC and process designers, because sapphire is a near-perfect insulator—it eliminates nearly all of the parasitic capacitance and leakage currents associated with the bulk node. This technology is highly valued for the RF switching and antenna-tuning functions in the RFFE of cellular handsets. Over 1 billion UltraCMOS products have shipped into the RFFEs of UE, to date.
A little history
When the first single- and dual-band designs for the RFFE switching function appeared on the market in the late 1990s, they utilized pin diodes, which combined high performance and low cost. However, these diodes required long quarter-wave transmission lines and large forward-bias currents to operate, so they failed to support efficient solutions for the follow-on quad-band architectures, which required a higher number of RF switch paths.
Designers then needed to accommodate the multi-band architectures of WCDMA/GSM networks, which required up to 9 switch paths. GaAs pHEMT and UltraCMOS ICs addressed numerous pin diode implementation issues associated with multi-band operation and, as a result, became the switching solutions of choice. Both technologies were able to support the +65dBm IP3 requirements demanded by the 3GPP specification. However, since then, LTE networks have greatly increased the performance requirements and the complexity of the switch function in UE.
We can address these challenges with our UltraCMOS technology. We have been developing this technology for more than a decade, and in 2004 we entered the mobile wireless communications market with our launch of the first commercial, high-volume SP4T flip-chip RF switch. This product, based upon our UltraCMOS technology, went head-to-head with the incumbent technology of the time—a multi-chip module built from a GaAs pHEMT IC.
Since then, handset architectures have evolved, significantly. The number of RF bands and switch paths in mobile wireless applications continues to increase, driving up the value of a highly-integrated monolithic RFIC. Today, over 30 switch paths are present in the RFFE of an advanced LTE handset.
Our technology has a roadmap that outpaces the multitude of other process technologies in the RFFE, which include, but are not limited to, pHEMT, HBT, RF SOI, BiCMOS, GaN, CMOS, and SiGe. Each of these technologies requires process, fab and R&D resources. Additionally, each has a unique roadmap supported by design engineers, process engineers and modelers. However, by definition, these roadmaps have limited synergy and do not enable a path to a fully monolithic, integrated RFFE. This means the R&D resources are diluted, because they must support multiple process technologies. In stark contrast, UltraCMOS technology has a clear path to the single-IC RFFE. As a result, all resources are focused on advancing a singular process, design, modeling, and supply-chain roadmap for the RF Switch, digital tuning and power-amplifier functions in today’s handsets
Table 1: Silicon-on-Sapphire (SOS) semiconductor process technology addresses the requirements of LTE with high-volume, highly-integrated RFICs, and a process, and product roadmap that offer performance advancements.
A key advantage of UltraCMOS technology is its use of a fully-insulating sapphire substrate. This substrate virtually eliminates the parasitic drain capacitance that is present in bulk silicon, resulting in three major benefits. First, it improves transistor performance, as there is less parasitic capacitance to be charged and discharged with every cycle. Secondly, the sapphire substrate enables higher isolation between circuit elements, allowing digital and analog blocks to sit next to high-power RF signals. For example, digitally-controlled RF switches that support 40 dBm of continuous power with athird order Intercept Point (IP3)>80 dBm are currently in production.
Another strength associated with UltraCMOS technology is that, unlike GaAs, it enables the integration of RF, analog, passive and digital circuitry on a single die. This high level of monolithic integration results in much smaller die and fewer external components. For example, a typical SP9T UltraCMOS switch is roughly half the size of a GaAs-based equivalent (see Figure 1). Reducing switch size is highly valued, because it can lead to a smaller overall RFFE, with greater design and layout flexibility, and fewer external components. This is important because the amount of space available for the RF section in RFFE designs continues to diminish, with the battery consuming more and more of the available real estate within a handset (see Figure 2).
Figure 1: Due to the monolithic integration that UltraCMOS technology enables, a typical SP9T UltraCMOS switch is roughly half the size of a typical SP9T GaAs switch.
Figure 2: The amount of space available for the RF section in RFFE designs is greatly diminishing, as the battery continues to consume the majority of real estate within a handset.
An additional benefit associated with UltraCMOS technology is that the products are manufactured with a standard, legacy CMOS process in conventional, qualified silicon foundries, leveraging existing infrastructure. This means second-source requirements can be addressed through twin sets of parallel supply-chain partners, and generational improvements can ramp quickly, through access to expansive high-volume capacity, with proven legacy fabs, and equipment.
Working with foundries, we have improved the performance of our switch. If a switch were perfect, it would have zero ‘on’ resistance, and zero ‘off’ capacitance. This is known as the RonCoff performance metric. We are getting closer to this ideal, thanks in part to refinements to our manufacturing technology (see Figure 3). Improvements in UltraCMOS’ RonCoff performance metric average 20 percent per year, vastly outpacing those for other technologies. For example, GaAs switches have advanced by less than 1 percent per annum.
Figure 3: UltraCMOS technology enables advancement in the RonCoff metric of more than 20 percent year-over-year, whereas GaAs technology has seen improvements of less than 1 percent per year.
In 2007, we launched products based on our STeP2 “Semiconductor Technology Platform" UltraCMOS single-die technology. Since then, we have continued to advance our RF switch portfolio. The latest incarnations incorporate our STeP5 UltraCMOS technology, the die size for which is approximately 83 percent smaller than the module size of a comparable GaAs-based product (see Figure 4). The STeP5 process utilizes a “bonded SOS technology" process. Demand for products based upon this process has driven the fastest new process production ramp in our history. According to an October 12, 2012 report from Navian Inc., we are the market leader for the main RF antenna switch for cellular handsets.
Figure 4: Standard CMOS processing has enabled UltraCMOS technology to advance at a pace that exceeds that of other semiconductor technologies, such as GaAs.
Perhaps the most prized attribute of SOS over GaAs semiconductor process technology is the high linearity it enables. This is because the introduction of LTE has resulted in linearity becoming one of the most difficult requirements in the RFFE. This is due to the worldwide deployment of LTE in a multitude of scattered frequency bands from 699 MHz to 2690 MHz. The consequence is a magnified RF-interference problem on the cellular networks, which has been compounded by co-existence and the simultaneous operation of multiple radios in today’s smartphones, including those for cellular, Bluetooth, WiFi and GPS technology. As a result, consumers experience declines in data rates and dropped calls that stem from harmonic and intermodulation issues.
The relatively severe broadband linearity requirements associated with LTE have increased the required performance and complexity of the handset antenna switch, which is already supported by quad-band W-CDMA and quad-band GSM. For example, a typical antenna switch must now have ten or more switch paths, and a third-order Input Intercept Point (IIP3) exceeding +67 dBm. On top of this, to support the use of the handset for simultaneous voice and data—where two transmit paths operate at the same time—cellular service providers are expecting the need for antenna switches to deliver a IIP3 targeting +90 dBm.
These requirements are challenging for many technologies, but UltraCMOS is up to the challenge. We combine UltraCMOS with inventions such as our HaRP linearity enhancements, and mixed-signal design, to create products that meet the linearity requirements of LTE in a single chip. For example, our SP10T PE426161 switch has a third order Intermodulation Distortion (IMD3) of -125 dBm in Band V (Uplink: 824-849 MHz, Downlink: 869-894 MHz)—an equivalent IIP3 of +75 dBm. We expect the linearity of our switches to continue to improve as we develop new generations of our UltraCMOS processes, as it has throughout the last five generations. For example, STeP5 switches have demonstrated third-order harmonic improvements of more than 30dB over that of STeP2 switches.
In comparison, when GaAs technology is employed in antenna-switch design, the use of depletion-mode FETs and their biasing requirements limits the maximum achievable linearity for a given device size. On top of this, GaAs, unlike UltraCMOS, has a fundamental flaw—it lacks an insulating gate oxide. A metal semiconductor junction connects the gate to the channel, and gate current flows into the channel in both the on and off states. The upshot is that, at high power levels, when the GaAs FET gate voltage is modulated, distortion products increase and make it more difficult to meet LTE’s stringent linearity requirements.
One of the trends within the handset is an increasing number of signal paths. This drives the need for higher on-die isolation, which prevents the coupling and bonding of signals that can degrade a multi-band RFFE’s performance.For example, in a multiband cellular handset, the PCS1900 transmit band overlaps with the DCS1800 receive band. Without isolation of 35 dB or better, unwanted in-band signals can pass through the filters and desensitize the receiver, resulting in dropped calls. To address this complexity, we launched the SP12T PE426171 switch, which maintains a minimum of 35 dB isolation at 2 GHz on all paths, in a form factor smaller than 3 mm2.
This product and others in our portfolio meet the requirements of today’s 4G LTE networks. The SOS technology on which these products are created enables higher levels of integration, isolation, and linearity than other compound semiconductor products (see table 2 for details). Switches are not the only SOS product that Peregrine manufactures for the RFFE. We also produce digitally tunable capacitors, digital attenuators, mixers/upconverters, prescalers and frequency synthesizers. Our portfolio of over 180 products enables designers to stay ahead of the curve with regard to advances in wireless communication devices and the infrastructure that supports them.
Table 2: Comparison of performance parameters of a commercially-available SP10T GaAs device to those of a commercially-available SP10T UltraCMOS device reveals that UltraCMOS technology performs better across many parameters.Note that the GaAs numbers are for two DIE—one being the RF switch and the other, the controller.
1 Andoh, Yoshiyasu (Navian Inc). RF Devices/Modules For Cellular Terminal Quarterly Market Report CY2012 2Q, Oct. 5, 2012: page 153.