News Article

Envelope Tracking And The Future Of The CMOS PA

With envelope tracking enhancing the efficiency of CMOS PAs to the levels of their GaAs cousins, is the incumbent technology under threat?


Recently, much has been made of the prospect of increased competition for traditional GaAs PAs from CMOS alternatives. Interest in this has been piqued by the release of products such as the Qualcomm RF360, which unites a universal PA, switch and antenna in a single front-end solution. 

However, although launches of products such as this have helped CMOS to make significant inroads into the cost-sensitive GSM GPRS and 3G markets, GaAs continues to dominate the mobile marketplace âˆ' more than 90 percent of new smartphones are built with GaAs PAs.

Whether GaAs will continue to dominate is a hot topic of discussion. One view that is being widely expressed is that the evolving market offers an opportunity for CMOS PAs to "˜kick GaAs', but the fact remains that the CMOS PA must overcome some technical challenges before it will undergo widespread deployment within the handset space. 

At the forefront of these is the fact that âˆ' despite success in the 2G market and some low-end 3G applications âˆ' significant performance drawbacks continue to limit deployment of CMOS PAs within high-end 3G and LTE applications.

Falling at the first hurdle 
Drawbacks associated with the CMOS PA include an inferior device gain, lower breakdown voltage, and challenges with RF simulation models. On top of this, CMOS designs have tended to be larger âˆ' roughly three times the size of a comparable GaAs die "“ due to their heavy use of inductors and transmission lines. However, these concerns, although important, are overshadowed by the biggest flaw of the CMOS PA: Its poor inherent linearity.

One of the merits of the GaAs amplifier is its flat gain characteristic until relatively close to its point of saturation; here the gain response rapidly falls off in the space of 2 dB (see Figure 1). By contrast, for CMOS, the PA curve is non-linear over a wide range of output powers, with a "˜soggy' compression characteristic stretching over the top 10 dB of the power range.

This lack of linearity is particularly problematic when a PA is used to provide coverage of 4G networks, which employ high Peak-to-Average Power Ratios (PAPR). Both classes of PA are capable of producing high enough peak powers to satisfy the requirement for high power constant envelope signals, such as GSM or simple 3G; but, for linear signals, such as 4G LTE, the CMOS device would need to be backed off to a low power, where the characteristic is relatively linear. This approach is highly undesirable, because it results in extremely poor efficiency.

Figure 1: Power amplifiers built from GaAs deliver a linear gain over a wide range, while those based on silicon are significantly non-linear.

Looking at the positives
Given these performance issues, why are CMOS PAs even under consideration for 4G handsets? Well, while GaAs is broadly synonymous with both RF design and HBTs, CMOS brings a number of attractive attributes to the PA marketplace.

One of the benefits of switching to silicon is lower production costs. While CMOS development costs can be higher at the product level, in large volume production the wafer costs for base CMOS are not just lower than GaAs âˆ' they are also undergoing a continual decline. What's more, working with CMOS technology opens the door to partnering with a wide choice of foundries that are capable of producing chips in far larger quantities; this, in turn, can help handset manufacturers regain control over their supply chains.

From a design perspective, the most attractive attribute of turning to CMOS is that it unlocks additional levels of integration. As a result, non-PA components, such as controllers, antenna switches and tuners, can all be readily integrated within the PA. Similarly, CMOS also offers the integration of on-chip calibration, plus performance enhancing functionality, such as complex bias circuitry.

What's needed is a way to draw on these benefits, while not suffering from the consequences of the inherent non-linearity of CMOS, which makes it very challenging for this technology to play a role in the 4G marketplace. 

Fortunately, this is possible by turning to external performance enhancement technologies that allow silicon CMOS PAs to compete with their GaAs cousins. At Nujira of Cambridge, UK, we have employed a technology that can do just that: Envelope Tracking (ET).

The primary benefit of ET is the hike it gives to the energy efficiency of a RF PA. This improvement results from the replacement of a traditional DC:DC converter with a highly agile, ET power supply modulator. Thanks to this modification, at any instant in time the PA is operating in a highly efficient compressed state, where the power supply voltage is just sufficient to enable the PA to transmit the instantaneous output power required (see Figure 2). 

Figure 2: Envelope tracking leads to far more efficient operation of a PA, because the supply voltage is varied to give exactly what is needed at every moment in time.

To do this, the ET power supply modulator has to dynamically modulate the power supply pin of the RF PA with a high bandwidth, low-noise waveform, synchronised to the instantaneous envelope (amplitude) of the signal being transmitted.

A key feature of ET systems is the digital control of the mapping of the instantaneous RF signal amplitude to the supply voltage using a programmable Shaping Table (see Figure 3). By defining amplifier behaviour with a digital look-up table, it is possible to optimise PA performance dynamically using software control. Thanks to this ET approach, non-linear devices are linearised with no computational overhead. When ET tracking, including the use of an IsoGain shaping table, is applied to a CMOS PA, this amplifier can be linearised to such an extent that it can meet both the stringent in-band performance requirements, such as error vector magnitude, and thetough out-of-band specifications, such as adjacent channel interference.

Figure 3: Envelope Tracking signal processing chain (courtesy of OpenET Alliance).

What is not clear, however, is whether the boost in linearity generated by ET is sufficient to enable CMOS to match "“ or exceed "“ the performance of traditional GaAs PAs. To answer that question, we have recently performed a series of measurements.

Assessing performance
To test the viability of CMOS for 4G waveforms, our team of engineers connected a prototype CMOS PA operating in the 700 MHz band (Band 13) to our ET modulator. By characterising the PA with our ET Surface Explorer toolset, we generated an IsoGain shaping table.

Efficiency measurements involved using a high-performance current probe to sample the instantaneous PA supply voltage and current. Armed with this information, the instantaneous power being supplied from the high bandwidth ET supply can be calculated. 

We also sampled the RF output power at high bandwidth, which enabled calculations of the collector efficiency (see Figure 4). These measurements revealed an average PA efficiency of 57 percent. This is a significant increase over a traditional GaAs PA without ET, where an efficiency of 30-35 percent would be expected for the same waveform.

Figure 4: The measured efficiency plot of CMOS PA from dynamic supply measurements. Note that each point on this curve represents a measurement of instantaneous efficiency captured at around 100 MSPS under dynamic ET supply conditions using an LTE waveform.

To assess the maximum linear power that could be achieved using IsoGain ET, compared to a fixed 3.4 V DC supply voltage, we fed the amplifier with a variety of different waveforms (note that for both forms of power supply, conditions were ACLR compliant at -38 dBc). 

These measurements revealed that the output power of the CMOS device quadrupled when driven with ET (see Figure 5). Meanwhile, when driven with a fixed supply voltage, the PA suffered significant nonlinearity with high PAPR waveforms such as LTE QAM.

Figure 5: Values for maximum linear power at -38dB ACLR: initial bias settings. These measurements reveal that the output rises by 6 dB, or fourfold, with the introduction of ET.

Improvements in the linearity of a PA that is powered with a fixed voltage are possible by optimising the bias settings of the device (see Figure 6). However, even then the results are inferior to those produced with ET IsoGain, which delivers twice the output power. 

Figure 6: Maximum linear power at -38dB ACLR: optimised bias settings.

Historically, ET has been viewed as an energy saving technology, and in our hands it can realise this. However, the main strengths of our patented IsoGain technology are the enhancement of the performance of a CMOS PA so that it delivers the same output power, linearity and efficiency as any GaAs PA âˆ' even for LTE signals with high dynamic range.

The very impressive performance gains resulting from the addition of ET will help to unlock an entirely new avenue for smartphone manufacturers and for future developments within the RF front-end. Now that CMOS PAs are demonstrating the capabilities to serve high-end 3G and 4G applications, the time has come when smartphone developers can start to explore the full benefits of an integrated CMOS system.

These developers may seek to improve upon GaAs PA modules that already include multiple GaAs die and a separate CMOS controller die, because it is difficult to integrate the complex bias generation and digital control circuits onto a GaAs die. 

Turning to a CMOS PAs could integrate these functions into a single chip, while delivering two substantial benefits: the use of simpler, lower-cost packaging such as flip-chip onto FR4 substrates; and the elimination of the "˜rats nest' of bond wires found within today's GaAs PA modules.

Integrating ET power supply modulators with CMOS PAs is relatively straightforward, because they have similar process requirements to those of a CMOS PA, and are today built on compatible CMOS process platforms. If further integration of ET power supplies with CMOS PAs takes place, mobile developers can benefit from reduced system cost and higher performance, opening up intriguing possibilities for the next-generation of smartphone products.

Making such a move should be an attractive option for the market leading suppliers of mobile phone modems and application processors, because they are all large, fabless CMOS vendors, with well-established foundry and supply chain relationships and significant buying power. 

These firms may take the view that as the value of the RF front-end increases, the potential to absorb the PA into CMOS, and therefore make it an integral part of the smartphone chipset, offers some potential for significant revenue growth,improved multi-sourcing ability, and greater supply chain control.

A middle ground?
While it's easy to see ET and CMOS as a "˜dream team' solution for the future of the RF front-end, the truth remains that GaAs continues to dominate 90 percent of the PA market. That's for good reason: GaAs is a well-established technology, and fundamental performance characteristics of PAs built with this material will continue to be advantageous in many applications.

However, ET is undoubtedly closing the "˜performance gap' between the GaAs PA and its CMOS cousin. With new CMOS PAs coming to the market, such as Peregrine's Global1 device announced earlier this year, there is potential for even greater performance gains. 

When provided with a more equal playing field, in the short term the choice between CMOS and GaAs PAs will probably come down to the individual purchaser. Regardless of where CMOS PAs eventually find their place though, it is clear that ET will play a lead role in getting there. 

With almost all PA suppliers and handset OEMs investigating this performance-enhancing technology, the question is no longer if ET it will impact the PA market, but when.

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