3D Integration Unites InP, GaN And Silicon CMOS
Devices in multi-material stacks deliver uncompromised performance, thanks to active substrates, wafer bonding and thermal vias by Andrew Carter and Miguel Urteaga from Teledyne Scientific and Imaging
Compared with silicon-based technologies, devices made with III-Vs offer superior high-frequency performance and better power handling characteristics. However, that’s not to say that silicon does not have a role to play. Electronic platforms made from III-Vs lack integrated low-power digital logic, so when they are used to make complex mixed-signal III-V-based systems, they have to interface with silicon CMOS at some level.
If these two material systems are united through intimate heterogeneous integration, this can unlock the door to new classes of microsystems that combine the performance of III-V transistors with the vast IP and manufacturing resources of CMOS. One of the key challenges is to ensure that the heterogeneous integration process does not impair the intrinsic performance of the III-V devices.