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This article was originally featured in the edition: Volume 24 Issue 7

SiC Industry Embarks On A Golden Era

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SiC production is ramping so fast that all those involved will reap the rewards BY RICHARD STEVENSON

On the up is the city of Birmingham, located in the heart of the UK. Cranes crowd its skyline, helping to re-generate a centre that will be bold, confident and self-assured. For those living and working here, the emerging architecture is shaping an optimistic view of the future.

Falling in to the beat of this city are those that came here this September to attended the twelfth European Conference on SiC and Related Materials (ECSCRM). Like its predecessors, this conference covered ways to identify and classify defects. But this topic no longer takes centre stage – that position is now occupied by leading makers of SiC materials and devices, outlining their plans for tremendous ramps in revenue over the coming years.

Illustrating how great an opportunity there is right now for the SiC industry, Andy Souzis from SiC substrate supplier II-VI remarked: “Our competitors are not Cree, Dow and Tanka Blue. There’s enough business for all of us."

Souzis, who spoke in a well-attended industrial session, revealed that II-VI is investing “tonnes of money" in capital growth equipment. The company expects sales from its SiC business to climb by 50 to 60 percent per year between 2017 and 2023.

Echoing these sentiments, Henry Chou from GT Advanced Technologies argued that there is now enough business for all the SiC crystal growth players. In his opinion, there is currently a shortage of 6-inch SiC, with the lack of supply having a big impact on the merchant market.

To start to address this, GT is producing and selling SiC crystal boules – its business plan relies on its customers processing this material into wafers.

GT has just built a facility that will have a capacity of 1,000 wafers per month – and if it needs to increase production by adding new tools, that is simply a matter of “copy and paste", according to Chou, who told delegates: “We plan to revolutionise the supply chain." Prices for SiC are expected to tumble, with GT’s material costs for SiC production tipped to fall by a factor of three-to-four by 2023.



Nearly 40 companies were represented in the Exhibition Hall. This is an increase compared with the ECSCRM conferences of yesteryear, underscoring the growth of the SiC industry.

Ramping of chip production also featured in the industrial session. Chris Dimino from Wolfspeed, A Cree Company, began his talk by explaining that the management of the parent company is shifting its focus from LEDs to SiC. The goal for Wolfspeed is to ramp its SiC annual sales from $200 million in 2017 to $800 million by 2022. Dimino said that the company has already made a good start: year-on-year revenue is up by 50 percent and there has been a recent signing of a long-term supply agreement with Infineon for 6-inch SiC wafers. This is the size that the market is moving too, but right now there is still much interest in 4-inch material.

Domino revealed that Wolfspeed is investing across the board in tools to increase capacity. Purchases included MOCVD reactors and metrology equipment. And if, in future, more floor space is needed to accommodate more machines, there is a building on the campus that engineers can move in to.

STMicroelectronics is also cranking up chip production. Speaking on behalf of the company, Mario Saggio claimed that the total addressable market for SiC devices could climb to $2 billion by 2025, and hetipped this sector to grow over the next decade at a compound annual growth rate of 45 percent. To take advantage of this, ST is expanding its capacity by 275 percent between 2017 and 2022. Further ahead, capacity will be even higher, partly due to a switch to production on 8-inch SiC, scheduled for introduction in 2025.

As well as increasing the volume of its existing products, ST will be introducing new generations of devices. The 650 V, 1.2 kV and 1.7 kV MOSFETs offered today will be superseded by devices with a lower specific on-resistance and a lower driving voltage.

Support the growth of the market for ST and its peers, MOCVD manufacturers are updating their tools. Aixtron’s Frank Wischmeyer told delegates that the AIX G5 WW C will launch next year. This fully automated tool, equipped with auto-temperature correction, is claimed to double throughout compared to its predecessor, the G5 WW, while trimming the cost of ownership by 30 percent.

Another company launching new tools is LPE of Milan, Italy. This family run business, which claims to have 80 percent of the market in China, currently offers a fully automated, small footprint, single-wafer reactor, the PE106A. This will be joined by the PE206A and PE208A, designed for 6-inch and 8-inch wafers. This duo has been developed during participation in the EU-funded project REACTION ECSEL.

Transportation, inverters and smart grids

Part of the reason why SiC device sales are taking off is that their producers are now thinking much more about the needs of their customers. That’s certainly the case with Infineon, which has devoted much effort to improving its system expertise.

Spokesman for the German electronic powerhouse, Peter Friedrichs, explained that he and his colleagues are now making dedicated products targeting specific applications. By understanding their customers thinking, they gained greater insight in to when end users would switch to SiC, and when silicon would be retained, even though its performance is inferior.

The PV inverter is a market where SiC is enjoying success, argued Friedrichs. He explained that the makers of these units place a great premium on efficiency, and value the reduction in the total bill of materials – it is 15 percent to 20 percent lower when using SiC, because the wider bandgap offers an opportunity to work at higher frequencies, and in turn this trims the cost of other components.

Charging points for electric vehicles provide another opportunity for SiC devices to replace those made from silicon. The current generation of charging stations have been built by stacking liquid-cooled 15 kW units, but the aim is to replace these with those operating at 60-75 kW. This hike in power density is only possible by turning to SiC, according to Friedrichs.

Another promising market for SiC power devices is in aircraft. Shane O’Donnell from Microsemi Corporation detailed this opportunity: he explained that by 2037 the number of passenger aircraft will have increased from 21,500 to 48,000, through the building of thousands of new planes that will feature more power electronics. Airlines are conscious of their environmental impact, and the motivation for using more power electronics in planes is that it replaces some pneumatic and hydraulic sources, ultimately saving fuel. Another benefit of a move to power electronic is that it could reduce maintenance, thereby increasing the proportion of time that the plane spends in the air.

If SiC devices are to win deployment on planes – where they would be used in the primary flight control systems such as ailerons, rudders and elevators – they will have to prove their reliability over a wide range of operating conditions. O’Donnell explained that on the runway in the likes of Dubai, temperatures can be as high as 50 °C, but on the flight they would be far lower. So temperature cycling is a consideration. Devices must also be able to withstand varying levels of humidity, vibration and shock, and exposure to X-rays.

O’Donnell and his colleagues have been putting SiC diodes and MOSFETs through their paces and the results, so far, are said to be “very positive". Testing above 80 °C has not exposed any issues, and operation beyond 110 °C is thought to be “very possible".

If SiC MOSFETs are to succeed in this applications, they will have to win the nod over the silicon IGBT. In SiC’s favour is a reduction in power dissipation by about 25 percent, and a higher operating temperature – particularly beneficial if the transistors need to be situated near the engine. However, these strengths need to be weighed against the cost of the SiC MOSFET, which is still high, according to O’Donnell, and the need for further qualification to validate ruggedness and reliability in an industry that is, as one would expect, highly conservative. In addition, effort needs to be devoted to optimising packaging, which in its current form is failing to exploit the high-temperature capability of SiC.

The grids of tomorrow offer yet another market for SiC. Outlining this opportunity, Michel Mermet-Guyennet from the Supergrid Institute in Villeurbanne, France, compared the performance of 3.3 kV silicon IGBTs and SiC MOSFETs, two options for use in high-voltage DC-to-DC convertors. In terms of performance, the class of device with the wider bandgap has the edge, enabling high-voltage DC converters to have losses that are 50 percent lower, a volume that’s reduced by one-fifth, and a mass trimmed by 14 percent.

One of the biggest obstacles to the adoption of the SiC MOSFET is its reliability: it needs to deliver 40 years of continuous operation. The most likely cause of failure, according to Mermet-Guyennet, is gate oxide reliability. To drive deployment of SiC MOSFETs in the electrical grids of tomorrow, Mermet-Guyennet believes that new standards for the devices will have to be introduced, along with the launch of higher-voltage products. “Manufacturers are not interested in 10 kV and 15 kV products."

To higher voltages

However, this may be changing. At ECSCRM, Edward Van Brunt from Wolfspeed told the audience that his company’s production of 3.3 kV and 10 kV transistors was moving to its 6-inch line.

Wolfspeed has always been at the forefront of SiC MOSFET development, and in Van Brunt’s talk he discussed the methods used to demonstrate the device’s robustness and reliability. The two devices scrutinised were: a 3.3 kV, 40 A MOSFET with a 27 μm-thick drift layer, a 50 mΩ resistance, and a chip size of 4.9 mm by 7.7 mm; and a 10 kV, 15 A MOSFET with a 100 μm-thick drift layer, a 300 mΩ resistance, and a chip size of 8.1 mm by 8.1 mm.

Evaluation of both of these MOSFETs began by applying a voltage across the gate for 1000 hours. With the 10 kV device, the surface roughness can be as high as 14 nm, so it is of comparable thickness to that of the gate.



Built in 1991 at a cost of £200 million, The International Convention Centre (ICC), Birmingham, played host to the twelfth European Conference on SiC and Related Materials (ECSCRM). The ICC, which has a capacity to hold 8,000 delegates, includes a symphony hall that can seat more than 2,000.

No failures occurred, so a time-dependent dielectric breakdown test followed. This indicated that the failure time for the 3.3 kV MOSFET at 175 °C exceeds 3000 years – and for the 10 kV cousin, this time to failure is even longer. High-temperature gate bias testing also produced encouraging results, with no failures observed in three lots of 25 transistors.

Another evaluation used by Van Brunt and co-workers was a high-temperature, reverse-bias test, which involved applying an electric field between source and drain. For this test, higher voltage devices are actually at an advantage, because their thicker drift layers lead to a lower electric field strength. In Wolfspeed’s 3.3 kV and 10 kV MOSFETs, they are 2.1 MV/cm, and 1.8 MV/cm. “[These values] are much less than those for commercial, lower voltage devices," explained Van Brunt.

High voltages are needed to conduct these tests, and if care is not taken in designing the rig, damage to it may occur. Wolfspeed has given much thought to testing, and this allows experiments to uncover the ruggedness of both the 3.3 kV and 10 kV devices.

The final test applied to the MOSFETs involved biasing the gate to the off-state, driving current through the device, and seeing if anything breaks. It’s not an easy test to undertake as the power dissipation in the 10 kV device can hit 205 W cm-2, while that in the 3.3 kV device can peak at 640 W cm-2. Device heating results, and this can lead to thermal runaway.

One solution is to turn to a pulsed DC test. However, this is difficult to implement and it extends the time taken: for example, when the duty cycle is one-third, the time to test lengthens from 1000 hours to 3000 hours.

To avoid this, Van Brunt and co-workers mount their devices on a large heatsink and use a large fan to cool the chip. Using this approach, tests on 61, 3.3 k V MOSFETs and 65, 10 kV variants, revealed “absolutely no change" in the forward drop in the body diode. In addition, no shifts were observed in other device characteristics, such as the on-resistance.

Another company producing high-voltage devices is Hitachi. At ECSCRM, company spokesman Naoki Watanabe described the development of 6.5 kV SiC IGBTs, which have lower on-resistances at high voltages than their MOSFET cousins.

Watanabe explained that one issue with conventional SiC IGBTs, which feature n-type layers well over
100 mm-thick, is their high switching losses. To reduce this, and maintain the low on-resistance, he and his co-workers introduced a drift layer just 60 mm-thick. This led to a 80 percent reduction in turn-off loss compared with a device with a 140 mm-thick drift-layer, and a 89 percent reduction compared with a device with a 170 mm-thick drift-layer.

Simulations of the MOSFET with the thinner drift layer revealed a low carrier concentration near the emitter. To address this, Watanabe and co-workers have introduced a box cell layout and a hole-barrier structure.

Another issue with this design is that the voltage between the collector and emitter increases in steepness as this device is turned off. That’s a major concern, because it threatens to lead to a malfunction in a power system.

The team at Hitachi have modified their device to prevent this from happening. They introduce a two-part drift layer with a higher doping on the collector side. Testing reveals that this refinement prevents any slope steepening during turn-off. Voltage overshoot is reduced from 5.3 kV to 4.9 kV, and there is suppression of the ringing and current curves. Encouragingly, these gains come without any degradation to on-state and off-state characteristics.

Operating at an even higher voltage is the gate turn-off thyristor (GTO). This class of device is ideal for pulsed power applications and hybrid DC circuit breakers, thanks to its absence of a gate oxide layer that opens the door to extremely high junction temperatures and very high currents.

Last year, Wolfspeed’s Sei-Hyung Ryu reported a 15 kV, p-type GTO at the International Conference on SiC and Related Materials (ICSCRM) – and in Birmingham, he went one better, revealing the results for a n-type variant. Switching from n-type to p-type increases carrier lifetime, slashing switching speed by more than an order of magnitude.

Measurements on the 1 cm2 GTO, which had an 0.465 cm2 active area, revealed a turn-off time of 170 ns – 45 times faster than that of the p-GTO. Turn-on time is also superior, at 102 ns rather than 140 ns. Operating at 15 kV, the leakage current is just 0.17 mA. “That’s miniscule compared with silicon devices," claimed Ryu.

To improve the GTO, Ryu and his co-workers will work on improving the carrier injection in their devices. Their efforts, along with others in this community, should lead to many new and exciting results reported at next year’s ICSCRM in Japan – and also the next ECSRM meeting, which will be in Torres in 2020.

At both these meetings, delegates will hear not only of the progress made in device performance, but also in sales and market penetration. If these advances live up to those predicted in Birmingham, those that attend will be in the midst of a golden era for this industry.



Car marker Jaguar, which has a factory in Birmingham, brought its iPACE to the exhibition hall. The all-electric car is powered by a 90 kWh, 388 V lithium-ion battery, and has a range of 480 km.








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