Controlling threshold voltage instabilities in SiC MOSFETs

System designers can now benefit from new test and stress procedures for SiC MOSFETs that realistically determine their worst-case threshold voltage variations.

BY THOMAS AICHINGER FROM INFINEON TECHNOLOGIES

One of the greatest strengths of the SiC power MOSFET over its silicon-based equivalent is its capability to operate at much higher switching frequencies and lower losses. Thanks to this, engineers can build advanced power electronic circuits that feature smaller cooling units and smaller passive components. These gains are so highly valued that as well as opening up new applications, they are enabling SiC MOSFETs to replace silicon counterparts in existing applications, where new ground is being broken for lighter, more efficient system design.

When engineers design circuits with SiC components, they expect that as well as exploiting the performance benefits, they will not be held back by any compromise in quality compared with silicon counterparts. There is an expectation from these engineers of a predictable electrical parameter stability over lifetime.

Unfortunately, until fairly recently the initial general impressions of these engineers had been that SiC technologies are not quite there. There were concerns, for instance, regarding so-far-unknown threshold voltage (V_TH) peculiarities, and their extraordinary electrical parameter drifts during reliability investigations. Scientific papers had shown large V_TH variations within short periods of stress, raising concerns that critical electrical parameters of SiC MOSFETs were highly variable, threatening to get out of control during operation in the field, sooner or later.

Until recently, the origin and the application relevance of these short-term VTH instabilities in SiC MOSFETs had not been fully understood, with literature reporting a wide range of parameter variations. Various possible reasons have been proposed. One is that first-generation products had varied levels of quality; and a second is that fundamental issues hampered stable, reproducible measurements of crucial electrical parameters, such as the threshold voltage.

Recently, this second issue has been addressed by the release of new measurement guidelines for evaluating the V_TH in SiC MOSFETs, published by JEDEC and drawing on contributions from our team at Infineon. We have gone on to develop a deeper understanding of the trapping dynamics at the metal-oxide semiconductor (MOS) interface. Outlined in this first section of this article, this insight has helped us to adapt VTH measurement routines so that they resolve the issue of undefined and non-reproducible measurements.

With a reproducible and reliable V_TH measurement procedure at hand, we have made further strides, finally quantifying the effect of electrical stress on the condition of a device in a standardised way. This has been most valuable in dispelling major doubts surrounding the overall stability and controllability of SiC MOSFET technology. Our findings include the revelation that the mysterious short-term V_TH variations are fully reversible and recur in every single switching cycle. Note that this effect, found in all SiC MOSFETs in the market and already present in pristine devices, is not a cause for alarm: it is an inherent device characteristic, rather than a reliability-critical degradation mechanism.