Applying the lessons learnt by the silicon industry will be crucial if optoelectronic integrated circuits are to make the transition to high-volume production with high yields, repeatability and further miniaturization, writes Michael Lebby of Ignis Optics.

Optoelectronic integrated circuits (OEICs) have gone through dramatic changes in the past two years. Much of this has come as a result of changes in investment dynamics. In 2000, optimism about investments in optical components skyrocketed, as reflected in the fact that roughly $2 billion was invested in that year. This large amount of capital (a great deal of which was funneled by way of venture capital (VC) investments), coupled with extreme optimism, resulted in relaxed evaluation criteria during the process of due diligence. In such an environment the competition for technical talent was both ruthless and expensive. In addition, many competing startups were funded, including some 3040 MEMS companies, 2030 optical systems companies and 3040 optical device companies. This behavior was not exclusive to the VC or start-up environments. Established companies generated a frenzy of acquisitions at often-inflated values, acquiring companies that had not yet developed products or revenue streams. The bubble bursts With radical reductions in stock prices, and the realization that business plans and earnings do matter, the perspective in 2001 is much more prudent and sobering. As a consequence, VC investments in this area will continue, but with far more scrutiny. Many of these start-ups will need to formulate more viable business plans, or else disappear at higher funding rounds. Critical to their success will be the experience of their management team coupled with the ability to nimbly address market demands and execute on their business plans. The issues now driving VC investment in the optical market are very much the same ones found in the IC market, namely: integration, automation, volume, and higher performance coupled with smaller footprints. In addition, if piggybacking off the IC industry can be achieved, this will be viewed as a bonus. Many silicon foundries and packaging and assembly lines are being viewed as sites to transform optical component manufacturing from a labor-intensive, custom operation into a truly automated manufacturing line. It is in this rapidly maturing environment that OEICs now find themselves. Integration The traditional definition of an OEIC implies a monolithic approach with devices lattice matched to a substrate. This method of OEIC fabrication gives lower packaging costs and reduced parasitic inductance and capacitance when compared to the hybrid approach, where individually optimized devices are mixed and matched. Examples of monolithically integrated devices include PIN photodetectors integrated with amplifiers, and electroabsorption modulated lasers (EMLs). Here, a DFB laser and voltage controlled optical modulator are integrated on the same chip. This method of modulation allows continuous operation of the laser, minimizing chirp. Monolithic integration represents a significant challenge when trying to optimize different devices grown in a single epitaxial growth run. Compromises between material choice, high quality epitaxy, and device performance have to be made. One approach to further integration has been to use selective area epitaxy. Here, one of a number of masking techniques can be used to allow deposition of device layers on specified areas of the substrate or upon previously grown device layers. Different devices may require different material systems to achieve optimal performance. It is here that monolithic integration stumbles, as lattice mismatching between different materials makes growing high quality crystalline layers difficult. Researchers have been busy trying to overcome this problem using a variety of techniques including wafer bonding (already firmly established in silicon microelectronics and MEMS), and the virtual substrate approach. Here, monolithically integrating III-V based devices with silicon microelectronics is one of the goals. As suppliers gear up for the implementation of OC-746 40 Gbit/s applications, a number of material systems are being considered for the new generation of devices that are required. InP is being seen by some as the material of choice for these high-speed devices. InP-based lasers and detectors are already established. If other devices are to be implemented in InP then monolithic integration seems a logical step. Many so-called integrated devices are actually hybrid components, with a number of discrete devices linked together on a single substrate. Examples of the hybrid approach include flip chip lasers mounted onto silicon platforms, opto devices mounted to glass platforms for display applications, waveguide structures with lasers/detectors, MEMS with driver electronics and emitters/detectors, and a variety of tunable lasers. The inherent flexibility of the hybrid approach should lead to a rapid rate of integration, as illustrated in , which predicts on average a doubling of the integration level every six months. It is anticipated that the growth rate will not be constant, but will show a series of steps and plateaus as new hybrid integration approaches are implemented and brought into production. Early indications are that the level of integration is actually ahead of the curve with examples such as silicon planar optical add-drop multiplexers (OADMs) using arrayed waveguides. These structures have device counts in the 100200 range for today s 40 channel versions. DWDM drives greater integration The major application that is driving this need for integration is the deployment of DWDM systems. These systems are currently moving into the 160 and 320 channel regime, each channel requiring amplifiers, detectors and lasers (although a tunable laser could serve multiple channels). The cost of such systems can be greatly reduced by increasing the level of integration, thereby increasing functionality while at the same time reducing footprint and packaging needs. illustrates the various levels of anticipated integration, starting currently with just a few devices, such as lasers, drivers and waveguides, to single substrate optical switch systems anticipated by 2007, using in excess of 10 000 devices. Life-cycles In addition to specific applications, it is useful to examine how a technology s life-cycle impacts its deployment. Typically, a newly developed OEIC technology will first see insertion into telecom systems. These can typically afford the latest technology since volume requirements are low and margins are high. After telecom systems have tested out the new technology, it becomes inserted into metro telecom/datacom systems, where the margins are still high, but volumes begin to increase. Lastly, the technology is inserted into datacom applications, characterized by cost reduction and very large volumes. The evolution of OEICs from a costly, low-volume technology to high volume lower cost products, has come about through the explosive growth in single fiber capacity in recent years and the multi-wavelength technologies that have been adopted. The anticipated increase in system transmission speeds as DWDM-type technologies migrate from telecom to datacom applications is illustrated in the table shown in , which is part of the OIDA roadmap assembled in 1999. Most of these numbers are on track to meet the 2005 goals, with the possible exception of the increase in residential speeds from 155 to 2500 Mbit/s. Multiplexing pushes up the speed The great enabler that has pushed both transmission speed and bandwidth has been the ability to pass multiple singles of differing wavelengths through individual fibers. This trend is not expected to diminish in the coming years, but to accelerate. Currently operating over C and L bands from approximately 1530 to 1610 nm, it is anticipated that within the next three years, fiber systems will be able to operate over S, C and L bands, encompassing a wavelength range of 600 nm from roughly 1100 to 1700 nm. With channel spacing of 50 GHz, this would allow a single fiber to carry 1500 channels, roughly 20 times more than is currently possible (). The challenges for manufacturing The technical challenges of developing laser sources capable of operating from 1100 to 1700 nm are daunting. An even bigger challenge is the ability to manufacture such systems today, given a manufacturing infrastructure that is characterized by a low level of automation, yields that are often as low as 10%, a process that does not lend itself to scaling to high volumes, and one that is extremely labor-intensive. This manufacturing bottleneck has been identified, and by applying silicon-processing techniques, higher levels of integration are being achieved. The implementation of arrayed waveguide grating (AWG) multiplexers using planar optical subassemblies on silicon wafers is a good example of this. This micro-optic form of OEIC has the potential for high-volume manufacturing. Other approaches to decreasing costs and improving yield are to implement AWG multiplexers in InP. The higher refractive index allows a great reduction in device size and monolithic integration with electronics, although there can be high coupling losses to the fiber. Some of these issues can be overcome with a hybrid integration approach by fabricating devices on silicon oxy-nitride. This evolution towards higher levels of integration is illustrated in . A system of multiple lasers of different wavelengths, followed by a MUX and erbium doped fiber amplifier (EDFA), is superceded by a tunable laser on a silicon platform providing the wavelength control ICs. Further integration follows with the MUX on the same platform as the tunable laser. Eventually, the EDFA is integrated with the MUX and laser functions on a common glass substrate. Conclusions Expertise developed by the semiconductor industry over the last 30 years will help to overcome many of the hurdles that OEICs will face in the near future. This is especially true in making the transition from small volume, labor-intensive production to high volumes where higher yields, greater repeatability, better tolerances and smaller devices will be critical. Further improvements will be obtained when these manufacturing enhancements are coupled with the use of silicon or silicon-like platforms in a hybrid integration approach. In addition, the design, foundry, and packaging aspects will be just as critical as any other aspect of the manufacturing process, including the need for the development of improved device simulation and CAD tools. Adopting the big fab mentality of running large numbers of devices, and using existing silicon packaging lines to assemble OEICs, will enable advantage to be taken of the development and know-how that silicon manufacturers have already brought to bear on the high-volume packaging problem.