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Technical Insight

Incremental levels of automation in the compound semiconductor fab (Cover Story)

In an effort to reduce cycle times and keep pace with changing market conditions, manufacturers of compound semiconductor devices are addressing the initial automation steps of WIP monitoring and management, writes Emmett Hughlett of Karl Suss America.
Producers of compound semiconductor devices are challenged to adapt production practices to an expanding market. The worldwide demand for compound semiconductors drives an accelerated market progression from low-volume, low-standardization products to high-volume, commodity-level products. Hence, economies of scale and best production practices play a critical role in the future viability of our industry s fabs and foundries. The jumbled-flow, job-shop production fab of the early 90s is now being superceded by connected/paced flow-line production. The compound semiconductor producer s world of low-volume, high-price products is giving way to the primary goals of low-cost, high-volume products. This paper reaffirms the volume manufacturer s maxim that cycle time (CT) minimization supplants high equipment throughput/utilization, leading-edge processes, and frequent inspection as core competencies on the volume production line. Factory automation is the means to CT control, but the production line must be dressed in the automation level that fits. Available automation technology is the result of the Darwinian evolution of automation driven by the silicon IC industry. The resultant automation technology is dauntingly visible as bookshelf-wide SEMI specifications, manufacturing execution systems, and automated material handling (AMH) hardware. The good news is that the trail to successful fab automation has been broken by our silicon siblings, so that compound semiconductor manufacturers can view available automation technology as a selectable menu for success. This paper details how the available incremental levels of automation are economically and rationally applied to the compound semiconductor producer s manufacturing technology roadmap. The end of the job-shop model In the mid 1990s, with total GaAs analog and digital IC shipments at about $250 million, commercial GaAs production surpassed military GaAs production for the first time. By the year 2000, total GaAs IC shipments reached $1.5 billion (Meyer). The same growth curve is seen for indium phosphide, lithium niobate, silicon germanium and other materials. Market conditions for emerging compound semiconductor technologies are rapidly changing, so that these products are starting to share the "big leagues" of commodity silicon-based products. The successful compound semiconductor manufacturer will prosper by rapidly evolving manufacturing processes that respond to these forward-shifting market conditions. The requirement to match production methods to market conditions is illustrated in the productprocess matrix of (Hayes and Wheelwright). merits close study. We see that compound semiconductors moved left to right, from product structure I to III, in less than five years. Producers efficiently responding to the demand increase will operate on or below the diagonal. In other words, they match the production process to the product structure. The silicon IC market is more mature. The Si 200 mm process structure approximates an assembly line, a connected flow line with interbay AMH. Si 300 mm is characterized by intrabay AMH, approximating a continuous-flow conveyer belt. In our industry, GaAs leads the way with the highest demand and the most stable processes. Cycle time reduction comes first The compound semiconductor production manager works to drive the process structure below the diagonal of the product process matrix shown in . Each step down the process structure axis is characterized by a step down in cycle time. illustrates the hierarchy of objectives common to every manufacturing organization (Hopp and Spearman). The fundamental objectives of profitability through cost control and high sales stand on a variety of subordinate objectives. Of all subordinate objectives, short CT uniquely services both low cost and high sales. The devil is in the details, and the details define the daily tactical decisions and commitments that consume the manager s time. Managing production is closer to combat than art. However, the successful compound semiconductor device manufacturer will treat cycle time reduction as the guiding principle behind almost every operational and process structure decision. At any operational instant, Little s law (CT = WIP/TH) dictates that CT is the ratio of work in process (WIP) to throughput (TH). This relationship is true for an entire factory or a single process station. TH is a quasi-static attribute, strategically altered via capital equipment purchases or process requalification. WIP, however, is the dynamic attribute and is managed tactically. shows that work in process (e.g. a wafer lot) is either in process (P) or is waiting in a queue to be processed. In any fab (efficient or otherwise) a wafer s life is pretty boring, spending 5098% of its time waiting (CTq), punctuated by exciting moments of value-added processing (CTp). Controlling the queue time of work in process is the key to CT reduction. This concept is simple, but challenging to execute, because WIP is a function of abstractions, namely process variation and utilization. Variation is quantified as either variation in arrival time (Ca) or variation in process time (Cp). Ca and Cp are unitless coefficients of variation. Utilization (u) is less abstract, and is the proportion of time (also unitless) the process station is performing value-added work on the product. The concept of overall equipment effectiveness (OEE) defines the upper limit of u as a quality attribute of the equipment. shows the well-known factory operational curves illustrating the equation that quantifies the relationship between Ca, Cp, u and WIP. The effect of variability on WIP is inconsequential if utilization is targeted at 30%. The effect of utilization on WIP is inconsequential if variability is less than 1. High volume production dictates the latter. The location of the operating point is a choice made by production management. For instance, Infineon considers variability between 0.75 and 1.33 to be moderate. Infineon targets variability at 0.4 with u = 0.8 for Si DRAM production (D Baur et al.). Before progressing to the subject of automation, let us summarize to this point. CT reduction is the production manager s objective. WIP minimization (mainly WIP in queue) proportionally reduces CT. Variability and utilization give us WIP. Hence the position of the operating point on the operational curves indicates how, and how well, production is achieving the goal. Incremental automation In actual production, variability and utilization, hence WIP, are inherently unstable and change instantly. The location of the bottleneck process shifts rapidly in a high-utilization line. Tactically, the production line must be sensitized to these changes using instrumentation to raise the alarm. This is the job of monitoring. Production must respond to the change and take corrective (controlling) action immediately. Strategically, long-term factory performance (for lines, process stations etc) must be recorded to establish a baseline for alarm thresholds and as a metric for continuous improvement. The silicon industry, through trial and error, evolved progressive incremental levels of automation to instrument, monitor, and control production. The compound semiconductor manufacturer should view this technical legacy as a selectable menu of resources in the form of implementation studies (white papers), integration-ready manufacturing execution systems (MES), and software/network interface standards (SECS/GEM, CIM). SEMI (www.semi.org) and SEMATECH (www.sematech.org) are clearing houses for this information. illustrates the fundamental increments of automation in a probable sequence of implementation. Before detailing each increment we note that few, if any, compound semiconductor manufacturers have progressed beyond the second step, WIP management. This is due, in the negative, to the high cost of entry for equipment interoperability and factory-wide automated production planning. It is also due, in the positive, to a high return on investment realized by implementing the two WIP management steps. WIP monitoring WIP monitoring is passive instrumentation that maps individual production lot status to process stations. Lot status is generally move-in, move-out, in-process, or hold. WIP queues and line WIP status is displayed. Lot status and location is keyed in (or bar-code scanned) at operator entry stations throughout the fab. Lot release data is input by production control. The data is maintained in a relational database, where the primary data is keyed on the lot-ID number. The WIP monitoring system is the manufacturing execution system (MES). It is a shop-floor control system for semiconductor manufacturing. The real-time collection and display of WIP status allows for tactical lot release based on production status. Most importantly, it sensitizes the line to increases in variability. Once the steady state of the production line is empirically established based on long run data, out-of-control lines can be quickly diagnosed. WIP, hence CT, will not be allowed to explode. For example, WIP naturally accumulates in front of a process station that is introducing unacceptable variability. This unplanned bottleneck is quickly visible. Production control will dispatch a corrective action team to determine the root cause and fix it. In this way, Cp for the offending process station is brought under control. WIP management WIP management is the second part of MES integration. The MES imposes rules on the handling, or movement, of lots through production. The complexity of the rules is proportional to the complexity of the production process. Two examples of process complexity common to compound semiconductors are time-limited moves, where a lot must begin the next process within a fixed time, and process iteration, where a lot will visit the same process repeatedly for each layer. However, the uniform motivation is to minimize WIP by reducing arrival time variability, Ca. Movement rules may be global across the line: for instance, WIP caps (limits) may be set at each process station. If a process station has reached its cap of lots-in-queue, then no incoming lot moves will be allowed. This is a classic kanban implementation to control CT by WIP limiting. Rules may prioritize lots-in-queue at a process station. For instance, lots of the same layer (process program) as the lot-in-process will get priority. This minimizes variability introduced by equipment set-ups. MES systems (bought or built) provide other capabilities, such as equipment maintenance schedules, periodic maintenance triggers based on wafer count, and report generation. Equipment interoperability Interoperable equipment is networked to a centralized host computer for the purpose of reporting detailed equipment-operating status. In the short term, real-time knowledge of process equipment status augments decision making when Cp moves out of control. In the long term, OEE for a particular process station is characterized. With OEE characterized, the upper utilization limit, or "equipment availability", is known. In both the short- and long-term cases, however, the primary focus is Cp control. After years of work, the SECS/GEM equipment automation software standards were generated by SEMI. The standards cover the hardware, software, and documentation needs for production equipment and host communication. Most high-end MES suppliers provide an upgrade path to interface "SECS/GEM capable" equipment into the MES database. Today, a small minority of process equipment in compound semiconductor factories is SECS/GEM capable. It is rarely specified in equipment buys, and most equipment for 6 inch and smaller wafers doesn t feature the standard. It will not be a common focus until MES implementations have matured. Automated production planning Shortly after successful MES integration, management will want to make the data available to the entire enterprise. The enterprise requirements planning (ERP) system will have at least read access to the MES database. This data, coupled with a model of the production line(s), enables automatic production planning. Production orders will be scheduled and dispatched based on the current WIP and equipment (line) status. Although not directly related to WIP control it is a form of CT minimization, since orders may be committed based on favorable capacity for a particular production line. Automated material handling AMH describes the automated movement of product from line to line or between process stations. Silicon production using 200 mm wafers saw implementations of interbay moves of wafer carriers among automated WIP queues, called stockers. The move to 300 mm Si production makes equipment-to-equipment intrabay AMH the big topic in the Si super-fabs. It is necessitated by ergonomics, since a boat of 300 mm wafers weighs 8 kg. Integration of AMH capability into MES WIP control is theoretically an attractive way to control Ca. However, the cost of ownership of AMH is high. Sematech s International Technology Roadmap for Semiconductors, 2000 edition, sets a goal for the cost of ownership of interbay AMH at 5% of total equipment cost, which is pretty expensive for a traditionally manual operation. The silicon industry waited for 200 mm DRAM production before implementing AMH, and compound semiconductor manufacturers will wait for similar production volumes before seeing a positive return on investment. Conclusions Manufacturers of compound semiconductor devices must drive manufacturing CT down to keep pace with changing market conditions. Industry leaders are addressing this requirement by embracing the initial automation increments, focusing on WIP monitoring and management. WIP control gives CT reduction by exposing and minimizing production variability. The next steps of equipment interoperability and MES/ERP integration are still on the horizon. A fully automated compound semiconductor line may never require AMH, the final automation increment. Further reading D Baur, W Nagel and O Berger 2001 Proc. Mantech conference. R Hayes and S Wheelwright 1979 Harvard Business Review Jan/Feb. W Hopp and M Spearman 1996 Factory Physics Irwin Press. M Meyer 1999 Compound Semiconductor Nov/Dec p26.
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