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Technical Insight

Single crystal oxides help silicon's advance (Silicon Update)

The ubiquitous Si/SiO2 interface is struggling to meet the demands of shrinking feature sizes in silicon microelectronics. Bob Metzger takes a look at an interesting alternative.
While the high quality of the Si/SiO2 interface, coupled with the large bandgap of SiO2, and favorable band offsets, permits the manipulation of charge at the Si/SiO2 interface through applied voltage to the gate, source and drain of a MOS structure, this interface is not perfect. As a consequence of the amorphous (SiO2)/ crystalline (Si) interface, defects are generated due to steric hindrance and bond coordination at that interface. High quality Si/SiO2 interfaces typically exhibit an interface state density in the mid-to-low 1010cm2eV1 range. These interface states can result in performance limitations at high electric fields (and therefore at high power, small geometries, or a combination of the two). As any III-V researcher well knows, one way to reduce interface state densities is to form the interface with two lattice-matched crystalline materials. Researchers at Oak Ridge National Laboratory are investigating crystalline replacements for SiO2 in the formation of interfaces with both Si and SiGe. By removing the amorphous element to the interface, the interface defects generated as a result of steric hindrance and bond coordination could be entirely eliminated. This would open the way for the type of bandgap engineering of interfaces that is common in III-V materials. Referred to as crystalline oxides on semiconductors (COS), the crystalline oxide is expressed as (AO)n(A BO3)m, where n and m are the number of atomic plane repeats of a given oxide, AO is an alkaline earth oxide, and A BO3 is a perovskite oxide. A and A are elements or combinations of elements from group IIA of the periodic table (Ba, Sr, Ca, and Mg), and B is a group IVA transition metal (such as Ti or Zr). Grown by MBE, in which (AO)n and (A BO3)m can be shuttered on and off, these alloys can be formed to cover the entire lattice range from Si to Ge (5.43 to 5.65 ). The perovskite oxides typically used are CaTiO3, SrTiO3 and BaTiO3, which are all mutually soluble in each other. As an example, mixing a 60/40 ratio of Ca and Sr results in a perovskite oxide with a lattice constant of 3.84 that rotates 45 to match silicon s 5.43 lattice constant. A Z-contrast image of a BaTiO3/Ge interface is shown in , illustrating the high degree of crystalline perfection possible at the interface between a perovskite oxide and a semiconductor. While the perovskites may have the desired band gaps and dielectric constants to make them candidates for a crystalline oxide in a COS structure, their band alignment and offset are highly unfavorable. This means that little or no barrier is generated to restrict the transfer of an electron across the perovskite dielectric. However, by introducing an alkaline earth oxide between the perovskite and the Si or SiGe layer, and varying its thickness, the resulting bandstructure can be modified to inhibit the transfer of electrons. A COS dielectric consisting of two monolayers of Ba0.75Sr0.25O at the interface of Si, followed by 52 monolayers of SrTiO3, was used in the fabrication on a 50 m channel length FET. The device showed a peak mobility of 321 cm2/Vs, the highest value obtained for any non-SiO2 gate dielectric. At high fields (> 5 105 Vcm1), where interface scattering dominates, the mobilities approach that of state of the art SiO2/Si interfaces. In another experiment, to determine the feasibility of inserting a thin alkaline earth oxide at the semiconductor interface to inhibit leakage, layer thicknesses ranging from 1 to 7 monolayers of BaO were used beneath a 250 BaTiO3 layer. Over this range of increasing BaO thickness for a structure grown on Ge, leakage current was reduced by six orders of magnitude, illustrating that the alkaline earth oxides can modify the interface bandstructure to inhibit electron transfer across the crystalline oxide. To investigate interface state densities in such structures, high frequency and low frequency C-V measurements of a 250 BaTiO3/Ge structure were made. The resulting interface state density was below the level of detectability for the equipment used, indicating a value of < 1 1010 cm2eV1, which is comparable to, or even better than, that achievable with an SiO2/Si interface. This work is still in its early stages, and experiments to determine the trade-off between interface state densities and leakage currents (by varying the thickness of the alkaline earth oxide layer) have yet to be concluded. However, this technology opens the way for a much greater control of the properties of the oxide-semiconductor interface, and allows for the fabrication of narrow insulating layers within Si structures. This could enable a whole new range of Si-based device structures. Further reading R McKee et al. 2001 Physical structure and inversion charge at a semiconductor interface with a crystalline oxide Science 293 468.
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