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Technical Insight

Vitesse, GCS and Alpha join the indium phosphide race (Headline News)

Following closely on the heels of TRW spin-off Velocium, three other companies are moving InP towards commercial markets. Both Vitesse Semiconductor and Global Communication Semiconductors (GCS) have announced the availability of InP foundry services, while Alpha has also developed an internal InP process. Vitesse launches foundry services Vitesse is making InP foundry services available for high-performance IC designs, including SONET OC-768 (40 Gbit/s), 100 Gbit/s Ethernet, wireless and RF applications. Vitesse fabricates InP ICs using a proprietary process which it believes will drive oscillation frequencies above 250 GHz, while reducing power requirements five-fold. Based on a vertical NPN bipolar transistor, Vitesse s process employs standard Si process equipment and manufacturing techniques on a 4 inch line in Camarillo, CA. Standard Al metallization is used instead of Au metals, lift-off and air-bridges. The company says proprietary contact designs allow high-temperature processing and the use of Al interconnects and oxide dielectrics. Vitesse offers wafers or partnerships based on its current single HBT process, which features ft and fmax values of 150 GHz and a breakdown voltage of 4.2 V. The company will also offer a double HBT process with a higher breakdown voltage, which will be ready later this year. A third process suitable for the integration of detectors and electronics is also available. GCS offers InP HBT wafers Foundry company GCS has added a new 4 inch InP HBT wafer process to its current portfolio of AlGaAs and InGaP HBTs, VCSELs, SAW filters and PIN diodes. For the last year the company has been working with strategic partners, including GTRAN, to supply InP HBT wafers from its foundry in Torrance, CA. The proprietary InP HBT process employs a carbon-doped base for long-term reliability and features a 1.0 m emitter width. The ft and fmax values are above 160 GHz for operation at a current density below 75 kA/cm2. GCS has now increased the current density to drive the ft value above 200 GHz. The company says the emitter width is scalable to sub-micron size, allowing lower power dissipation and higher frequency circuits, including 40 Gbit/s ICs. "It was a natural progression for GCS to develop an InP process to address the 40 Gbit/s requirement of OC-768 and PAs for 3G handset applications," said Owen Wu, GCS s CEO and president. Alpha jumps on the InP bandwagon Alpha Industries has also introduced an InP HBT process for analog chips used in the physical layer of next-generation 40 Gbit/s optical networks. See . Alpha believes that InP delivers key performance advantages over competing technologies such as GaAs and SiGe, including the ability to manufacture smaller and more power-efficient products as a result of excellent thermal properties, higher threshold voltages and greater frequency response. Equally important, InP also enables the integration of electronic ICs and optoelectronic devices such as photodiodes. "InP extends our semiconductor process technology arsenal, which already includes InGaP HBT, GaAs MESFET, GaAs PHEMT, silicon and ceramics," said Ding Day, Alpha s VP of Process Development. "This will enable us to manufacture devices with ft and fmax values above 120 GHz, performance that is essential for high-speed data applications." The process will take advantage of the automated production line at Alpha s fab in Sunnyvale, CA (formerly Network Device Inc), which currently runs various GaAs processes on 4 inch substrates with a capacity of 500600 wafers per week. InP HBT epiwafers will be obtained from various suppliers, including Kopin. According to L J Ristic, Alpha s chief technology officer, InP HBTs are ideally suited to analog functions such as TIAs, limiting amplifiers, laser drivers and modulators operating at 40 Gbit/s. "Our plan is to have an InP process developed by the first half of next year, and then to use the process to make devices towards the end of the calendar year 2002," said Ristic. "While the first devices will be single-HBT devices, our aim is to eventually produce double-HBT structures, which have a higher breakdown voltage." Ristic added that for mixed signal circuits, which include clock data recovery and MUX/DEMUX functions, the performance requirements are not as stringent as for analog chips, which consume more power. "Mixed signal functions in the physical layer will be adequately served by InGaP HBT circuits or even SiGe ICs, which are currently available for OC-192 [10 Gbit/s] data rates," he said.
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