US Invests $7 Million In III-V CMOS Technology
The US-based university-research consortium Semiconductor Research Corporation (SRC) has launched the Non-Classical CMOS Research Center to develop III-V materials for improving the capability of CMOS.
The center, which has $7 million of funding over three years, will be led by the University of California (UC), Santa Barbara, and draw on expertise from UC-San Diego, and the universities of Stanford, Minnesota and Massachusetts-Amherst.
"We plan for the Non-Classical CMOS Research Center to ensure that Moore's Law will be alive and well for several generations," remarked Jim Hutchby, director of Device Sciences for the Global Research Collaboration, a unit of the SRC that is responsible for narrowing the options for carrying CMOS to its ultimate limit.
"When the day comes that Moore's Law for classical silicon CMOS is no longer a viable solution, we'll have developed a new set of materials and devices for improvements to speed and power of the historically successful CMOS technology," he added.
Results from the research are expected to make a significant impact on chip manufacturing between 2012-2014.
The US collaboration will be competing with IMEC, the semiconductor research center in Belgium, that is also developing III-V materials for CMOS (see related story) .
Partners in IMEC's project include Riber, Infineon, Intel, Matsushita, Philips, Samsung, ST Microelectronics, Texas Instruments and the world's biggest foundry - Taiwan Semiconductor Manufacturing Company.