TriQuint Joins The Integration Game
At TriQuint Semiconductor we are planning to join a handful of manufacturers offering high-functionality integrated chips with the launch of a BiHEMT manufacturing process in the second half of 2008. This technology, which unites power HBTs and E/D PHEMTs, will target existing applications that have previously required hybrid HBT/PHEMT approaches and new applications that will also benefit from this form of monolithic integration.
Our technology will enable the integration of high-efficiency HBT power amplifiers (PAs) with E/D PHEMT-based logic and control circuitry, low-noise amplifiers (LNAs), and bypass, bias and antenna switches. It will also deliver other benefits, such as HBT-based electrostatic damage-protection circuitry, which is more effective and compact than similar schemes employing PHEMTs.
Recently, other GaAs manufacturers have developed monolithic chips incorporating FETs and HBTs. These chips have improved bias control circuitry and bypass switches in cellphone PAs, and have even found application as integrated LNAs and PAs for WLAN. But it is possible to raise PHEMT performance to a level suitable for power switch applications, which allows PAs and antenna switches to be integrated onto a single chip.
Our BiHEMT process promises exactly that. Although the GaAs cost per unit area is higher than that for standalone HBT or PHEMT fabrication, our approach promises cheaper and smaller modules because it eliminates the bondpads and bondwires used to connect the different types of transistor.
While it delivers many advantages, the BiHEMT approach is not suitable for all applications. Not all future power modules will need this technology. Those modules where a hybrid system based on a separate HBT and PHEMT-based die is cheaper will not use our approach. But our technology, and other schemes for integrating HBTs and FETs, will be cost competitive for today s
W-CDMA applications and next-generation highly integrated radio front-ends.
Like most GaAs HBT/FET integration technologies, our approach is an extension of an existing HBT process, with PHEMT-specific steps inserted between HBT device-specific processes and passive/interconnect metallization formation. Our PHEMT s high performance is ensured by separating this device from the HBT with an etch-stop layer (figure 1). This design philosophy means that the entire AlGaAs/InGaAs PHEMT epitaxial stack – including the heavily doped GaAs ohmic contact layer – is placed under the GaAs/GaInP HBT subcollector. The PHEMT is electrically isolated from parasitic capacitances because it sits directly on the semi-insulating GaAs substrate. Consequently there are no compromises in the PHEMT epitaxial structure that require special processing or result in a degraded performance.
Our epiwafers are grown in a single MOCVD growth run on low dislocation density vertical-gradient-freeze substrates. Forming emitter and base metallizations to the respective HBT epilayers is followed by etching through the entire HBT epitaxial stack and the etch-stop layer. E- and D-mode PHEMT fabrication follows, with shallow implantation used to isolate the devices (figure 2). The thin remaining PHEMT epitaxial layers in the field do not require a deep, high-energy HBT-style implant.
We then add passive structures, such as resistors with a sheet resistance of 50 Ω, 1200 pF/mm2 high-density capacitors, and 2 and 4 µm plated gold metal interconnects (figure 3). Similar to existing volume HBT and PHEMT processes, the dielectric material benzocyclobutene is inserted under the first and second metallization steps to provide a flat surface, which ultimately allows the construction of interconnects that are suitable for highly flexible and dense routing.
Transistor performance trade-offs
Getting the right balance between FET performance, complexity and cost is the key challenge facing BiHEMT developers. Unfortunately, the PHEMT s performance is degraded by the growth of additional layers for the HBT, while the rugged topography associated with BiHEMT wafers hampers the gate formation.
Growing the HBT on top of the PHEMT causes lengthy thermal cycling due to the additional MOCVD steps. This reduces carrier mobility due to heat-driven diffusion of silicon donors in the delta-doped AlGaAs layers, which are positioned on either side of the InGaAs channel. This diffusion leads to an increase in PHEMT on-resistance by up to 50%, and it is responsible for a higher FET switch loss and reduced FET amplifier efficiency.
Meanwhile, the tall HBT mesas in the vicinity of the gate hinder submicron patterning processes. Not only must the gate photoresist completely cover the HBT mesas, but it also needs to stand up to gate dielectric etch, metal deposition and lift-off steps. The upshot is that we can t put our gate patterns and HBT emitters too close together. In addition, we are forced to increase the gate length of our E/D PHEMT process from 0.5 µm – the value used for standalone devices – to 0.7 µm for BiHEMTs.
Although the HBT process used for BiHEMT fabrication is very similar to the standalone process, the new epitaxial structure slightly degrades HBT performance due to increased thermal and contact resistance, and higher collector capacitance.
This increase in HBT thermal resistance results from the insertion of the PHEMT epistructure and the etch-stop layer between the HBT and the substrate. These additional high-thermal-resistance layers contain the ternary compounds AlGaAs, InGaAs and GaInP, which are used in the Schottky layers, the PHEMT channel and the etch-stops.
Although these ternary compounds have far higher thermal resistances than GaAs (the values for InGaAs and InGaP, for example, are more than 10 times as great), the BiHEMT process only increases the HBT s thermal resistance by 5%. That s because there are two dissipation paths for the heat generated in the HBT collector: either up and over, through the gold-plated thermal shunt; or down through the PHEMT epistructure and GaAs substrate, which leads to significant lateral heat spreading within the HBT (figure 4).
The HBT s collector resistance is influenced by the subcollector s thickness. Selecting the appropriate value requires a trade-off between process complexity and subcollector sheet resistance. Contact and undepleted collector resistances also affect the HBT s collector resistance. The BiHEMT process only leads to a 20% increase in this resistance, despite a three-fold increase in subcollector sheet resistivity.
The BiHEMT process also increases collector capacitance by 10%, due to looser device layout rules that are required for the deep HBT isolation etch.
For HBTs produced by the BiHEMT process, DC and RF device characteristics are essentially the same as those for our standalone HBTs, thanks to the similarity of the two processes. For a 3 × (3 × 30) µm2 emitter HBT, the typical current gain is 80, the base-collector breakdown voltage is 24 V, and ft and fmax are 36 and 53 GHz, respectively, at 2 V and 20 kA/cm2. Ft is unchanged from our standalone HBT process, but fmax suffers from a 10% reduction due to the small increases in the collector s capacitance and resistance.
Aside from the on-resistance degradation resulting from subsequent HBT growth, the BiHEMT s PHEMT performance is similar to that of our nominal 0.5 µm E/D PHEMT technology but is scaled by the slightly longer gate. Typical D-mode PHEMTs produce a peak transconductance of 300 mS/mm, a source-drain current of 160 mA/mm and a maximum current of 420 mA/mm. The device s pinch-off voltage is –0.8 V, its gate-drain breakdown voltage is 22 V and it has an on-resistance of 2.0 Ω-mm. The RF characteristics include a typical ft of 20 GHz and an fmax of 57 GHz.
For an E-mode PHEMT, transconductance hits 460 mS/mm and the current peaks at 240 mA/mm. This transistor s typical pinch-off voltage is +0.3 V. It has a gate-drain breakdown voltage of 23 V. The RF characteristics include a typical ft of 22 GHz and an fmax of 65 GHz.
Our BiHEMT development will now focus on improving process flexibility. This will allow us to address a larger share of today s BiHEMT market, while simultaneously penetrating into new market sectors. Our latest BiHEMTs provide a FET performance suitable only for on-chip control circuitry, bias control and low power switching. However, future applications could include the integration of control circuitry onto the GaAs PA chip, alongside high-power output switches for W-CDMA and ultimately GSM, which would cut module sizes and part count in mobile handsets.
Applications such as this will demand significant improvements in PHEMT density and performance. The goal of integrating GSM PAs and antenna switches on a single chip, for instance, would require a significant improvement in the on-resistance of the PHEMTs in our BiHEMTs to meet the insertion loss goals. Other applications, such as the on-chip integration of high-end transmit and receive parts, will deliver similar improvements in PHEMT technologies. To meet all of these demands will require further innovations in epitaxial growth and process technology.
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