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Technical Insight

Comprehensive simulations aim to cut SiC device development costs

Developing SiC devices via tests on a range of prototypes is an expensive business. Simulations can slash the costs, but success demands carefully accounting for the material's anisotropy and very low intrinsic carrier concentrations, say Synopsys' Sudarshan Krishnamoorthy and Vidas Mickevicius.

It s clear that many firms have recognized SiC s great potential for making power devices. Companies across the globe are now investing heavily in this material, with the goal of producing high-efficiency devices for applications such as DC to AC conversion in hybrid electric vehicles and high-voltage DC power transmission.

These efforts are expensive, but the rewards come in the form of electrical and thermal properties that significantly reduce costs at the system level. For example, SiC s high thermal conductivity can cut the cost of heat sinks employed for power dissipation.

Bringing many of these fledgling designs to market involves costly device optimization. Building and testing real SiC devices is particularly expensive because substrate costs are high. However, savings can be made by turning to simulations. And although software will never replace the growth and fabrication of real die, simulations can cut the number of experimental wafers needed to design and optimize a developmental device.

One of the most popular types of software tools is technology computer-aided design (TCAD) simulation programs. These employ physical models to provide key insights into device operation. Various technologies have been developed and optimized with this approach, ranging from highly scaled silicon CMOS structures to power devices, non-volatile memory and image sensors.

Device developers perform TCAD simulations by selecting structural details, like a material s layer thickness and doping profile, placing electrical and thermal boundaries, and setting device bias conditions. The program then calculates electrical characteristics, which are usually displayed as a set of graphs. This approach can help to tailor a structure to specific market applications that demand particular performance characteristics.

During the last five years there has been an increase in the application of TCAD to SiC development. This is because this type of simulation can provide key insights into internal device characteristics at different biases and temperatures. The effects of adjusting doping profiles, structural dimensions, the contact s work function or the dielectric constant of a passivation layer can be assessed in just a few days. This might sound like a long time, but performing a similar study by experiment can take weeks or even months. TCAD can also help to locate the sweet spot of optimum yield through tools that create "response surface models" by correlating multiple input variables to output electrical characteristics.

Modeling the behavior of SiC devices is not trivial – it demands care. Unique technical issues arise from the material s anisotropy, as well as its incredibly low intrinsic carrier concentrations, which result from SiC s wide bandgap. The anisotropy stems from SiC s hexagonal structure, and calculations must account for directional variations in properties such as carrier mobility, thermal conductivity, electrical permittivity and impact ionization.

At Synopsys – which is headquartered in Mountain View, CA – we have refined our TCAD device simulator, Sentaurus Device, so that it is capable of dealing with the complexities of SiC device modeling. This package is suitable for modeling SiC Schottky barrier diodes that have been commercially available for some years. It can also aid research into other devices like vertical-junction FETs and MOSFETs for high-frequency, high-power applications. The latter devices are more complex and offer more options for device optimization. This means that it takes more time and effort to maximize device performance, which allows simulations to play a larger role in reducing development times and costs.

We believe that any SiC device simulator must have three key attributes. It must include a comprehensive set of physical models to describe carrier behavior inside the material; it must employ robust numerical algorithms to solve coupled non-linear differential equations; and a physically reasonable set of model parameters is essential.

Sentaurus Device meets all of these criteria and uses a comprehensive set of physical models to describe carrier transport, generation and recombination in response to variations in electrical bias and thermal conditions. Predictions for direct-current characteristics, time transients and small-signal characteristics can be calculated from these simulations.

Our SiC device simulator can also account for the material s polytype. This has a massive impact on the bandgap, which ranges from 2.39 eV for 3C-SiC, to 3.33 eV for 2H-SiC. For power devices, 4H-SiC is the most popular. This has a bandgap of 3.27 eV.

Crunching numbers with care
The wide bandgap has a profound influence on carrier concentration, which is typically of the order of 10–10 carriers per cubic centimeter. Handling these very low carrier concentrations can be numerically challenging. The robustness of current-voltage curve simulations hinges on the level of precision used to store and process these ultra-low numbers, which feature in coupled non-linear equations in a floating-point arithmetic operation.

We have made significant strides in accounting for such low carrier concentrations during the last year. The low carrier concentrations seen in SiC can now be catered for with "extended precision", which enjoys many more bits to store floating point numbers than regular simulations performed on Linux and Sun workstations. This enables us to capture the extremely low currents during a typical breakdown simulation and observe the breakdown characteristics of a 4H-SiC PiN diode (figure 1). Anisotropy of 4H-SiC was accounted for in these calculations.

Our tool s ability to capture very low currents is rarely matched by other simulators. Rivals can t cope with such low currents because excessive noise in the numerical simulation causes them to crash.

The easy way out is to resort to non-physical methods, like increasing the temperature for device simulation. This increases the currents and allows the simulations to converge, but means that this technique cannot be used for temperature-dependent studies. This is a major problem for high-power SiC devices – they operate at high temperatures and it is important to capture how the material characteristics change with temperature.

Basic material data requirements
Predictions of SiC device performance are reliant on the input of accurate values for the material s characteristics, such as bandgap, mobility, carrier lifetime and impact ionization coefficient. Anisotropy adds to the complexity, but we have addressed all of these concerns with a calibration process that matches simulation results with experimental ones.

Three technical papers have been used as sources of experimental data for these calculations. A variety of device types have been selected – Schottky barrier diodes, PiN diodes and vertical-junction FETs – and the focus has been on obtaining accurate values for the anisotropic carrier mobility and impact ionization coefficients in 4H-SiC. Using more than one device s experimental data is essential, otherwise this would merely be an exercise in curve fitting.

The first paper was a study on the temperature dependence of hole impact ionization coefficients in 4H and 6H-SiC by Jayant Baliga s group at North Carolina State University (figure 2). We calibrated impact ionization coefficients by simulating the Schottky barrier diode that Baliga s team measured. This diode has a Schottky contact for an anode, with a specified work function of 4.5 eV. The breakdown voltage of 520 V from the simulation matched the experimental value for this device.

We also simulated a PiN diode fabricated by Tetsuo Hatakeyama and colleagues from Toshiba s corporate research and development center in Kanagawa, Japan (figure 3). This paper focused on the anisotropic nature of impact ionization coefficients in SiC. Our simulations contain physical models that account for doping and electric field-dependent anisotropic mobility, doping and temperature-dependent Shockley Reed-Hall recombination, Auger recombination and band-to-band tunneling. We also include an anisotropic Chynoweth model for impact ionization, and models for incomplete ionization and bandgap narrowing.

The third device that we have studied is a vertical-junction FET built by Jian Zhao s team at Rutgers University, NJ (figures 4 and 5). We decided to model this device because its crystallographic orientation is ideal for calibrating mobility values parallel to the crystal axis.

Calibrations with these three types of device have enabled us to determine values for impact ionization and electron and hole mobility along SiC s and directions. Armed with the right models and these material values, Sentaurus Device can provide valuable support for the development of SiC devices. We can t guarantee 100% accuracy for every device because SiC s characteristics can depend on many factors, including the fabrication process. However, simulations with our software can provide a starting point and can cut project costs by reducing the number of wafers that are grown on substrates during SiC device development.

Further reading
J Baliga et al. 1999 Solid State Electronics 43-02 199.
T Hatakeyama et al. 2005 SISPAD 01-03 171.
J H Zhao et al. 2003 IEEE 14-17 1.   

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