News Article


GaN FETs grown on large silicon wafers should make a big impact in the multi-billion dollar power electronics market. They can operate at breakdown voltages of up to 800 V, offer superior switching efficiencies to silicon incumbents and give little away in cost, says IMEC's Marianne Germain.

Tune in to the news and two of the phrases that you'll probably hear repeatedly are "energy scarcity" and "sustainable energy generation". Many nations considering these issues have decided to try to reduce their dependence on oil and gas imports, which makes even more sense given the recent volatility in the energy markets. Greener forms of domestic power generation are now viewed as the way forward, alongside more-efficient energy usage.

Power electronics has a big role to play in these endeavors because it influences the operating efficiencies of existing electrical equipment and that of emerging renewable technologies. This form of electronics is already incorporated in computer switch-mode power supplies, and it is also deployed in the electrical conversion systems found in hybrid electric vehicles and solar power plants.

Unsurprisingly, revenue generated by power electronics is rising substantially. According to French market research firm Yole Développement, power electronics currently accounts for 10% of the total semiconductor market. Sales from this sector are increasing at a compound annual growth rate of more than 11%, which is 4% faster than the overall semiconductor market.

Although power electronics has a healthy outlook, improvements in component operating efficiencies are minimal. Silicon is the overwhelmingly dominant technology and it has already been optimized. Today, for example, the best silicon MOSFET already slightly outperforms its unipolar limit.

To significantly improve efficiency, what's needed is the development and commercialization of devices built from new materials. This effort is already well underway, and academic and industrial researchers around the globe have been developing devices based on wide-bandgap materials that have far higher breakdown voltages and operating temperatures. Our independent research center, the Interuniversity Micro Electronics Center (IMEC) in Belgium, is part of this effort, and we have been working on GaN-based devices.

GaN has one major advantage over the other popular wide-bandgap material, SiC – it can form an epitaxial heterostructure with AlGaN. This combination creates a two-dimensional electron gas with excellent transport properties at its interface, and ultimately leads to transistors with the best combination of high voltage and high electron velocity. This type of device also delivers very low switching and conduction losses – lateral GaN HEMTs are three to four orders of magnitude better in this regard than vertical silicon MOS structures.

However, GaN-based power electronics with this array of characteristics will only generate substantial sales if prices are comparable to those of silicon devices. This means that manufacture must be carried out on a low-cost platform that is easy to process. Silicon substrates meet these requirements, particularly when they have diameters of at least 150 mm. If reliable devices with 600–1000 V breakdown voltage and a low specific on-resistance can be reproducibly manufactured on this platform, then there is a good opportunity for a chip maker to grab a significant share of the power electronics market.

At IMEC, we have started to develop a process for this type of chip manufacture and have reproducibly fabricated large, crack-free, GaN-on-silicon epiwafers. These can be processed to form FETs with breakdown voltages of more than 600 V and specific on-resistances that are an order of magnitude lower than commercially available silicon MOSFETs.

Our growth is carried out on silicon (111), the cheapest form of silicon substrate that is suitable for III-nitrides. We've been developing our growth process on this material for several years, and in 2006 we produced the first crack-free AlGaN/GaN HEMT epiwafers on 150 mm silicon for RF applications. This was followed up by a collaboration with the German MOCVD equipment manufacturer Aixtron that led to the growth of a 1 µm thick crack-free epitaxial layer of GaN on a 200 mm silicon substrate, which we announced this June.

Stresses and strains

Controlling the stress within the epilayers is a major challenge for III-nitride growth on silicon. Stress engineering in the heterostructure is the only solution for deposition on large-diameter substrates, and our approach involves the addition of sufficient compressive strain during growth. This strain can balance the tensile stress that results from the post-growth wafer cooling.

We employ various tools to assist our strain engineering that provide in situ measurements of temperature and wafer bowing. This includes "Argus", a temperature measurement tool co-developed with Aixtron that features a calibrated photodiode array. We use an interferometer that monitors epiwafer reflectivity and also provides data that can reveal growth rates and surface roughness. This tool has been modified to detect any deviation of the laser beam and reveal any bending or bowing in the wafer. These tools have played a crucial role in the development and implementation of our growth processes, which can now produce crack-free, mirror-like epiwafers with acceptable levels of wafer bow for processing.

Material for power electronics must also be able to withstand high operating voltages. We have found that although the standard AlGaN/GaN HEMT structure is suitable, breakdown voltages can be increased by more than 50% by adopting a double-heterostructure design. This improvement is delivered without any increase in the separation between the source and drain contacts, and can produce devices that reach a breakdown voltage of 1000 V at a buffer thickness of 3.7 µm. Performance gains result from greater confinement of electrons in the channel and increased aluminum content in the AlGaN layers (figure 2).

We have also discovered that the breakdown voltage is actually limited by the silicon substrate, rather than the AlGaN layer, if the contacts are separated by more than 5 µm. Increasing the buffer thickness can deliver further gains in breakdown voltage, as long as the stress is controlled.

After our epitaxial structure has been deposited, a Si3N4 layer is added in situ by MOCVD to protect the underlying III-nitride layers. This patented deposition process creates a smooth, passivated surface that is stable up to 900 °C and suitable for device processing.

Our in situ SiN passivation process has several unique features. It prevents the AlGaN surface from reacting with air and it allows deposition of high-quality AlGaN layers with higher aluminum content, by preventing relaxation of this layer. Higher aluminum-content AlGaN layers bring several benefits, including a reduction in sheet resistance and a lower on-resistance. We can employ our Si3N4 deposition process in a controllable and repeatable way to regularly produce double-heterostructure FET epiwafers with in situ SiN passivation on 100 and 150 mm silicon.

Material produced by this approach has been processed into FETs with breakdown voltages of up to 800 V. These devices have the smallest gate-drain distances for a transistor with this breakdown voltage, despite the absence of field-plates that reduce peak electric field strength. This result illustrates the promise of III-nitride devices, which have the potential to overturn silicon equivalents that currently dominate the power electronics industry.

Lateral thinking

Our small gate-drain distance – it is only 5 µm in our transistors with a 600 V breakdown voltage and their 800 V equivalents with a 3.7 µm buffer thickness – improves device performance. This is because the channel resistance restricts the performance of these lateral devices, which feature source, gate and drain contacts on the top surface. However, the effect can be minimized by placing the source and drain contacts closer together.

The on-resistance of our GaN-on-silicon double-heterostructure FETs is more than one order of magnitude smaller than silicon devices. The specific on-resistance of our 600 V transistors is just 4 mΩ cm–2, which is comparable to the best values obtained by other GaN-on-silicon developers. However, our transistor combines its low on-resistance with increasingly small lateral device dimensions. It is possible that more device improvements could result from better designs and further reductions in contact resistance.

Silicon MOSFETs have been criticized for relatively high losses during switching. Fortunately, our GaN transistors don't seem to suffer from the same fate and ongoing studies show that they have promising switching characteristics (reduced transient times). Silicon devices are still plagued by Miller capacitance – the parasitic capacitance between gate and drain – which leads to charging of the gate and ultimately inefficient device switching. Our devices, on the other hand, have a much lower Miller capacitance and its effect on the switching performance is negligible.

One of the drawbacks of these GaN HEMTs is that they operate in depletion mode. Enhancement-mode devices are preferred from a safety perspective in power-conversion applications because they are normally off. But we have produced some normally off HEMTs that have a positive threshold voltage of 0.3 V and a current density of more than 0.3 A/mm. The process used to make these devices included a fluorine implantation below the gate. However, this is not ideal because it causes local damage below the gate of the channel, leading to large current dispersion and instability at high temperature.

We are planning to improve the performance of our enhancement-mode HEMTs by optimizing the top layer stack. Other efforts over the next few years will include the development of transistors with breakdown voltages of 1000 V and a reliability study of our devices. We've also noticed that standalone GaN devices are being sampled to the market and we believe that the integration of Schottky AlGaN/GaN diodes and transistors on the same die, processed within the same flow, offer an extremely promising technology for making power-converter modules. This type of technology could, for example, integrate solar-power inverters closer to solar cells, thereby reducing the complexity and size of solar systems.

Further reading

K Cheng et al. 2008 Phys. Stat. Sol. 5 1600.

D Visalli et al. 2008 Ext. Abstr. IEEE Int. Conf. on Solid State Devices and Materials, Tsukuba 148.

View pdf of article

CS International to return to Brussels – bigger and better than ever!

The leading global compound semiconductor conference and exhibition will once again bring together key players from across the value chain for two-days of strategic technical sessions, dynamic talks and unrivalled networking opportunities.

Join us face-to-face between 28th – 29th June 2022

  • View the agenda.
  • 3 for the price of 1. Register your place and gain complementary access to TWO FURTHER industry leading conferences: PIC International and SSI International.
  • Email  or call +44 (0)24 7671 8970 for more details.

*90% of exhibition space has gone - book your booth before it’s too late!


Search the news archive

To close this popup you can press escape or click the close icon.
Register - Step 1

You may choose to subscribe to the Compound Semiconductor Magazine, the Compound Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.

Please subscribe me to:


You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in:
Live Event