LED Researchers Tackle Electrostatic Menace
Three groups have published methods to combat the sensitivity of high power LEDs to catastrophic damage by electrostatic discharge.
The Japanese and South Korean scientists have each attacked the problem "“ estimated to cause average product losses between 8 and 33 percent across the semiconductor industry by the American National Standards Institute "“ from very different angles.
Researchers from Kookmin and Kyung Hee Universities, both located in Seoul, have teamed with compatriot LED manufacturer EpiValley in raising InGaN LED capacitance.
“Electrostatic discharge (ESD) energy dissipation in the LED is inversely proportional to the magnitude of [its total capacitance]," the team explains.
In an Applied Physics Letters paper published online on April 1 they say that the high capacitance LED they produce “would be relatively insusceptible to the ESD shock."
To increase capacitance the Korean researchers changed the silicon doping level in a 10 nm-thick thick n-type GaN layer immediately below their device's multi-quantum well (MQW) from 3 x 1018 cm-3 to 2 x 1019 cm-3.
This better matches the 4 x 1019 cm-3 magnesium doping concentration in the 200 nm-thick p-type GaN layer immediately above the quantum well.
Keeping the depletion region in the diode as narrow as possible ensures a higher capacitance. The raised proportion of silicon doping in comparison to magnesium doping reduces the depth to which the n-type region of the LED is depleted of carriers under reverse bias.
In a human body model ESD test, the pass rate at -500 V reverse bias for the LEDs with a lower silicon dopant concentration was 27 percent. This compares to 94 percent for more highly silicon-doped LEDs, a pass rate that was maintained up to -7000 V.
Japanese compound semiconductor manufacturer Eudyna Devices has achieved a similar increase in ESD tolerance voltage simply by adding an extra heating step to the deposition of GaN LED layers.
In a US patent application published April 16 the company heats its MQW active region at 975°C to improve its crystal quality. It then deposits the subsequent p-type GaN layer at a temperature more than 150°C below this, to make sure no magnesium dopants diffuse into the active region.
The Eudyna team asserts that both crystal defects "“ which can expand at high voltages "“ and magnesium dopant contamination in the MQW can lower ESD tolerance. In fact LEDs with contaminated and unheated MQWs showed ESD tolerance voltages of 500 V and 571 V respectively, while and LED fabricated using the method described in the patent application showed an ESD tolerance of 3857 V.
Two Samsung Electro-Mechanics US patent applications published on April 16 both exploit their approach to improved ESD performance, which uses transition metals in the structure.
The Korean conglomerate s subsidiary used yttrium or scandium to allow an increase in the temperature at which it could grow the electron emitting layer directly beneath its devices MQW.
Normally this electron emitting layer is made from InGaN, but indium evaporates at deposition temperatures above 1000°C, which Samsung says would otherwise produce improved crystal quality. Consequently it uses GaScN/AlGaN or GaYN/AlGaN layers instead, which can withstand 1000°C-plus temperatures.
As well as producing high-quality crystals, the bandgaps of these electron emitting layers help ensure good current spreading. This reduces the LED s driving voltage and further increases the magnitude of the ESD voltage tolerance.
While also potentially improving LED chip yields and reliability, these approaches could also simplify LED package manufacturing, says Joachim Reill, director of LED application engineering at Osram Opto Semiconductors.
Reill pointed out to compoundsemiconductor.net that today ESD reliability of packaged LEDs is often achieved by using a separate ESD diode switched antiparallel to the LED. “A more ESD stable chip would enable us to eliminate this ESD diode", he said.