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European Consortium Announced CMOS Success For Microelectronic Fabrication

A pan-European consortium has announced that phase-one targets have been met under its CMOS photonics project, paving the way for the technology to be used in a variety of applications.




A consortium launched by the European Commission in 2008 now has 19 partners which have exceeded or met its phase-one goals for the large-scale complementary metal oxide semiconductor (CMOS) photonics project.

Leader of the HELIOS pan-European consortium Leti announced the development, which is a step closer in developing microelectronics fabrication processes which will be used for integrating photonics with CMOS circuits.

It is hoped that this will then enable the technology to be used for a variety of groups. CMOS technology is already used in microcontrollers, microprocessors, digital logic circuits and static random access memory.

CMOS technology has a number of advantageous benefits, one of which is its low static power consumption - with significant power only taken when the transistors in the device are switching between on and off states.

This means that not as much waste heat is produced. It also has high noise immunity.

Successful benchmarks reached by the partners - some of whom are the University of Barcelona, Technical University of Vienna and the University of Trento - include the demonstration of a high-efficiency grating coupler which shows a three decibel bandwidth of 80 nanometres.

Another achievement includes the demonstration of germanium photodiode bandwidth of 90 gigahertz.

Commenting on the CMOS project, Laurent Malier, chief executive officer of Leti, said: "Europe has a well-established photonics-components industry and it is strategically important for us to maintain photonic chip design and chip-integrating functions that provide new opportunities for our microelectronics companies and enable us to compete with other countries."

The developments could lead to low-cost technology for applications such as optical sensing and communications, optical signal processing and optical interconnections between circuit boards and semiconductor chips.

Essential building blocks will also be progressed; the integration of III-V semiconductors on silicon - aluminium nitride, indium arsenide, gallium nitride and boron phosphide are to name a few.

Portable device lifetime and energy savings could be made if superior semiconductor materials could be exploited in silicon devices. CMOS engineers think some III-Vs could be used to cut power consumption without sacrificing chip speed because of their higher electron mobility properties.ADNFCR-2855-ID-19561817-ADNFCR
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