News Article
GigOptix Unveils Ultralow Power 14G VCSEL Driver and TIA for SFP+
The firm’s latest offering provides a complete serial link solution for applications up to 14Gb/s. The chipset comprises the HXT4101A VCSEL driver and the HXR4101A multirate receiver.
GigOptix, a leading supplier of high performance electronic and electro-optic components that enable next generation 40G and 100G optical networks, is sampling its new pre-production chipset for short reach 2-14Gb/s serial optical interconnects.
Building on the company's expertise in providing low power 40G and 100G parallel short reach devices, GigOptix' newest offering provides a complete serial link solution for applications up to 14Gb/s.
GigOptix' chipset is comprised of the HXT4101A VCSEL driver and the HXR4101A multirate receiver. The chipset is designed to not only enable ultra low power consumption of less than 150mW for 100m links and 250mW for 300m links but also minimize the components required to implement a transceiver in order to reduce costs.
The HXR4101A receiver is a limiting Transimpedance Amplifier (TIA) with pre-emphasis output that eliminates the need for the post amplifier required in current industry solutions and supports multiple rates from 2Gb/s to 14Gb/s making it ideal for systems requiring backward compatibility.
The HXT4101A VCSEL driver supports up to 14Gb/s data rates while consuming less than 65mW delivering 7mA average and 7mA modulation current. The easy to use and compact designs enable applications to extend from datacom into avionic and consumer applications.
"We are very excited to introduce this new chipset solution that uniquely addresses the current and future datacom short reach needs," stated Jörg Wieland, VP and General Manager of GigOptix-Helix, Zurich. "We developed these highly innovative products to address customer demand for high performance, lower power and better cost efficient solutions. Taking a fresh look at how we as an industry implement our transceivers, we leveraged the latest process technologies to optimize the architecture of the devices to improve performance while at the same time reducing power consumption and system cost."
