News Article

Multi-source Manufacturing: Overcoming Challenges Reaps Rewards

When the order books swell to breaking point, chipmakers can go and build a new fab. But isn’t it better for them to hold on to their cash and find a foundry partner that replicates in-house processing and provides a second source of product manufacture? This is the Anadigics’ way, say the company’s Dan Stofman and Kevin Chang, who tell the story behind implementing this strategy.

At some point in the career of nearly every IC designer the time comes when they face the challenge of designing products for different semiconductor fabs or technologies. This could result from the designer switching employer, or involve the company adding a foundry to its manufacturing strategy. However, regardless of what exactly happens, there is often the need to translate existing designs to a new fab or process.

At the outset, developing products for a different fab is tough, due to a lack of experience with a new design kit – the set of tools and documentation that describe the capabilities and limitations for device layout, processing, modeling, test, reliability and statistics. This kit provides a complete design environment – including design rules, design rule check algorithms, and the device models for making any device.

Foundry service providers have excelled at delivering robust, well-developed design kits for their customers.

However, the nature of RF and microwave devices often requires additional design kit customization to enable manufacture of unique structures. This presents a challenge when working with a foundry service.

Matters are further complicated by a foundry’s specific implementation of any process using both bipolar and field effect transistors (a BiFET process). For years GaAs circuit designers have longed for the flexibility that silicon designers enjoy with BiCMOS technology, which can take advantage of the best characteristics of both bipolar transistors and FETs. This dream is now a reality, thanks to the introduction of a III-V BiFET technology that allows integration of HBTs and pHEMTs, implemented in InGaP on a single GaAs die.

However, this newfound freedom comes with a price, creating additional challenges when designing products in multiple BiFET fabs. The BiFETs are being used to manufacture high-efficiency power amplifiers for mobile phones and other cellular communications equipment. This is a growing market – according to Christopher Taylor from the market analysts Strategy Analytics, the GaAs device industry has recovered nicely from early 2009 to register strong revenue gains, driven primarily by GaAsbased power amplifiers in smartphones. Growth in smartphones and other cellular devices will continue, leading to a doubling of power amplifier demand to more than 4.5 billion units in 2015. Smartphone use is also helping to spur a dramatic increase in data consumption on wireless networks, leading to growth in infrastructure radio equipment, which also uses GaAs.

At Anadigics, which is based in Warren, NJ, we are at the forefront of the manufacture of chips incorporating BiFET technology. To meet the demands of our customers and increase our sales in the handset sector, we are increasing manufacturing capacity. To do this, several years ago we embarked on a multi-source strategy, adding a foundry component to our existing in-house capability. Such an approach combines tremendous flexibility in overall capacity with the retention of fixed internal capacity that is invaluable for technology and product development. We needed to find a fab partner that could reproduce the range of high-quality, differentiated products that we had developed in our 150mm InGaP GaAs fab. Examples of our trailblazing efforts include the first development and implementation of a commercially viable BiFET process into volume production, called the InGaP Plus, plus thedevelopment of several generations of products using this type of process.


Anadigics has developed a BiFET process at its fab in Warren, NJ

In the fourth quarter of 2009, we revealed that we had signed a strategic agreement for the design and manufacture of GaAs ICs with the Taiwan foundry WIN Semiconductors. Our thinking behind this move was to utilize the GaAs fab capacity of WIN for several new product lines, while we would continue to manufacture other new product lines and existing products in-house. WIN is a good match for us, because it provides foundry services in HBT technology utilizing InGaP as the emitter material. This Taiwanese foundry was selected because one of its HBT processes can deliver BiFET products with RF power, performance, linearity, and reliability similar to our own InGaP-Plus BiFET processes.

Since announcing our strategic agreement, we have worked closely with WIN, and our engineers have leant how to utilize WIN’s foundry for the production of industry leading 3G and 4G RF power amplifier devices. Implementation began with WIN providing us with a design kit for the desired BiFET process. Our engineers were then able to start porting designs from the in-house fab process to that used by our foundry partner. However, inevitably, there was some teethingtrouble, with some device structures failing to exactly match the characteristics of those produced at the Warren fab.

After extensive analysis, the causes of the divergent product performance characteristics were identified as a combination of differences between the BiFET processes at the two fabs and the inclusion of several unique device structures utilized in our novel design approaches. To address this, engineers from both firms worked together, extending and qualifying WIN’s design rules to accommodate the required device structures. These rules were optimized for both our product development and WIN’s process.

Success in our relationship with WIN hinged on development of device models that are optimized for the specific products that are fabricated with the BiFET process employed at the Taiwanese foundry. Designers can simulate the overall performance of full circuits and products with transistor device models that capture the electrical behavior of devices. When our engineers use these models, they are particularly interested in the behavior of transistors under specific, large-signal RF conditions. This interest extends to the impedance and parasitic capacitance of metal interconnects between and to these circuit elements.

In addition to accurate device models, designers tend to use ‘rules of thumb’ or known methods to design their products. Often these are based on experience in a proven process using predictable device models. Consequently, the best way to determine the optimal device structures needed for full product design was to begin by process-engineering wafers with test structures at the WIN fab. Our technology team characterized these test structures and then defined new models that would support our performance and layout requirements. Specifically, we used this characterization to support new scalable models for FETs and HBTs.

Once the new models were generated, they were included in a design kit specific to the simulation tool used by our IC designers – the Advanced Design System (ADS) from Agilent Technologies. An ADS design kit includes all information needed to design and simulate an IC in a supported process. Device definitions are included, along with the associated model files and subcircuits, the corresponding schematic symbols and the presentation of the symbols to the user in convenient library and palette listings.

After the new design rules were qualified by WIN, the official design rule manual was updated. This document consists of a series of numerical and descriptive physical layout rules that designers must adhere to, to ensure highyield product manufacture. Since the design rules are specific to a particular semiconductor manufacturing process, new and converted IC layouts must be updated to comply with all rules for the targeted process.

The next two steps were to roll out identical definition and documentation of the new design rules at both fabs, and then update the design rule check (DRC). A DRC is a comprehensive, automated verification for ensuring the physical layout of a particular IC complies with all design rules. We also created a custom DRC regression test suite of sample device layouts to ensure that any changes to the DRC software did not create any false reported rule violations from other design rules that were not changed. By putting in the effort to create both a comprehensive design rule manual and well-implemented DRC software, we had laid the foundations for realizing higher overall product yield and reliability, shorter design cycles and faster time to market. Once the new DRC had been validated in conjunction with the design manual and the test suite, it was run on existing engineering mask sets to confirm its ability to reliably identify design rule violations. Creating the new device models and a design kit is an iterative process. When devices and structures are first created, they are done so using agreed-upon development and qualification criteria. At this stage, the proposed design rules are also validated, to confirm that they support the desired devices and structures and produce the anticipated results. Once the initial device models are completed and the design kit updated, the process is repeated to optimise the models, design manual, and ultimately, the DRC software.


The HELP3DC series that is manufactured at WIN has been optimised for use with DC-DC converters

Whatever this approach sounds like in theory, it will be judged by how it works in practice. And it does – we have been able to develop products for manufacture at WIN, while churning out chips with industry leading performance and reliability at our own fab. What’s more, we now find it as easy to roll out new products at our partner’s fab as we do in Warren. We decided that the first set of products to reach volume production at WIN would be the HELP3DC series, which is based on our unique High-Efficiency-at-Low-Power (HELP) technology. The HELP3DC series provides the same benefits as its predecessors, but has been optimised for use with DC-DC converters. The new HELP3DC products manufactured at WIN have shown the same industry leading performance as the HELP products manufactured in-house.

Our implementation of multi-source manufacturing required significant effort from our partner and ourselves. This yielded a significantly enhanced design kit, thanks to leveraging our exceptional engineering technology, device modeling, and design talent in harmony with the processing and technology expertise at WIN. The upshot is the opportunity we now have to design new products at WIN with the same performance as products made in-house. This enables us to ship even more products that give customers the worldclass performance and reliability they have come to expect.

© 2011 Angel Business Communications. Permission required.

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