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Technical Insight

Dielectric pillars aid light extraction

Poor light extraction holds back LED performance. But this can be avoided by inserting a patterned dielectric stack on top of the device, an approach that has the added bonus of controlling the far-field emission pattern, says Ahmed Noemaun from Rensselaer Polytechnic Institute.

In an ideal world, every photon that is generated within an LED will exit this device and provide useful illumination. But in practice this doesn’t happen – some photons are trapped inside the chip due to total internal reflection at the surface boundary, while others are lost to absorption that can occur at metal contacts.

To increase LED extraction efficiency, engineers have improved device design with techniques such as surface texturing, shaping the chip geometry, patterning the sapphire substrate and inserting photonic crystal structures. If these modifications were not applied, blue LEDs would have a minimal light-extraction efficiency of around 25 percent, and the corresponding figure for their UV cousins would be no more than a few percent.

Fabricating sub-micron patterns by lithography is elaborate and expensive, factors that limit the application of photonic crystals and sapphire-substrate patterning for LEDs. Controlling these processes is also difficult, and can deteriorate the device’s internal efficiency and its electrical properties. 

A simplistic, cost-effective approach to extracting the optical modes trapped inside the LED chip is surface roughening. Conceptually, this approach is very simple: Some of the light is extracted through sharp, pointed features on the surface, and that which remains is reflected and diffused, reducing the chance that it will be permanently trapped inside the semiconductor chip. Several techniques can be used to roughen the LED surface, including crystallographic wet chemical etching of the nitrogen-face of GaN. However, these methods tend to be specific to the LED semiconductor material or its surface-plane orientation and cannot be applied uniformly to all LEDs. In addition, these techniques offer little control over the features of the roughened surface, preventing any modification to the LED’s far-field light emission pattern.

 At Rensselaer Polytechnic Institute we have pioneered a new approach to boosting light extraction that is not limited to any LED semiconductor material or its  orientation. This technology, which can also tailor the far-field emission pattern, involves the addition of graded-refractive-index (GRIN) patterns to the top surface of the LED (see Figure 1). Without this modification, most of the light that strikes the planar top surface of an LED is reflected – only a small proportion is incident at an angle that falls within the ‘escape cone’ and can exit the device. With our approach, output power is increased through the insertion of a dielectric pillar above this top surface, which creates a pillarsidewall with a curved circumference that acts as an additional surface for light extraction.



Figure 1: A carefully designed graded-index pillar with five dielectric layers can extract trapped optical modes occurring inside the LED semiconductor

Thanks to this addition, the light escape region has now increased, because it encompasses both the original escape cone of the top layer and the escape cone on the sidewall of the pillar. That’s not the only benefit of this approach, however: If the pillar is composed of GRIN layers, light entering the pillar refracts at each layer boundary, eventually striking the sidewall at near- normal angles of incidence. Consequently, all the trapped optical modes can be extracted out of the LED chip through appropriate design of the refractive index and height of the layers forming the GRIN stack.

Eliminating light trapping due to total internal reflection is possible by selecting the refractive indices of the layers so that the critical angle at the boundary of consecutive layers is complimentary to the critical angle of the sidewall-air interface. Note that the bottom layer must be chosen to have a refractive index closest to that of the top of the LED chip to ensure no coupling loss at this interface. Each layer in the GRIN stack extracts light incident on the layer’s surface at a specific range of incident angles.

For example, in our structure the first layer, which has a refractive index of 2.47, extracts light striking the top of the LED chip between 66° and 90°. In comparison, the second layer, which has a refractive index of 2.26, enables light extraction for emission incident between 54° and 66°. 

With our approach it is possible to prevent light from bouncing back into the semiconductor without striking the sidewall through careful design of the height-overwidth ratio of the individual layers that form the pillar. These constructions are arranged in an array to form a GRIN pattern, and choosing the spacing of these pillars is a delicate balancing act. If they are too far apart, not enough light enters the pillars and gains in LED extraction efficiency are modest; but put them too close together, and a significant proportion of the light exiting one pillar enters its neighbour, rather than leaving the device.

Putting theory into practice



To produce pillars that can extract all the optical modes of the LED, it is essential to work with a pair of transparent materials with vastly different refractive indices. To this end, we employ the high-refractive-index material TiO2 in conjunction with a low-refractive-index partner, SiO2. Films of these oxides can form a composite dielectric layer with any desired refractive index from 1.46 to 2.47 – its value just depends on the ratio of the two materials.

In our case, we use sputter deposition to form a GRIN stack containing five layers with different refractive indices, each of which was formed by carefully selecting the powers applied to the SiO2 and TiO2 targets. We add a thin indium tin oxide (ITO) layer onto this stack that acts as a hard mask for the subsequent dry etch (See Figure 2 (a)).



Figure 2:


(a) Scanning electron microscopy image (SEM) reveals a stack of GRIN layers made up of TiO2 and SiO2 with an indium tin oxide layeron top.

(b) An SEM image of an array of GRIN pillars

GRIN patterns are defined in the LED wafers by a combination of contact lithography and an inductively coupled-plasma (ICP) dry etch. (The ITO is dry etched under a CH4, H2 and Cl2 environment to pattern the hard mask, before the GRIN layers are etched under CHF3). The sidewalls of the pillars that are formed can extract all the trapped optical modes because they are smooth, vertical and contain minimal residues such as particles (see Figure 2(b) for an example).


We have put our LED design to the test by fabricating GRIN patterns on the planar top surface of thin-film GaInN/GaN blue LEDs. This modification increased light output power by 131 percent and boosted the light extraction efficiency to around 70 percent. Performance is influenced by the type of pillar employed, and we have found that LEDs with diamond-shaped GRIN pillars are brighter than those made from cylindrical pillars. The reason: Light entering cylindrical pillars can be trapped inside these structures, and bounce around their edges in whispering gallery modes, a frailty that does not afflict diamond-shaped structures.




 Figure 3: LEDs with GRIN structures can deliver superior light output compared to a planar reference LED and a roughened reference LED


One of the major differences between our LED and more conventional designs is that the peak emission intensity is no longer along the surface-normal of the device’s top surface. Instead, due to light leaving the device through the sidewalls of the GRIN patterns, peak emission intensity from the LED is off the surface-normal between 25° and 55°. The far-field emission pattern of GRIN LEDs has bi-lobes (similar to bunny ears!), rather than the Lambertian pattern produced by typical LEDs (see Figure 4). However, peak emission intensity can be shifted towards the surface-normal by modifying the slope of the GRIN pillars with a short-buffered oxide etch (see Figure 5).


 


Figure 4: Far-field emission pattern of LEDs coated with GRIN patterns and reference LEDs with a planar top surface


This fine-tuning of the emission pattern with a simple additional step at the end the fabrication process introduces a design flexibility, which is an incredibly valuable feature that is available only with our approach.


Our work is in its infancy, and we are now searching for the perfect combination of size, shape, arrangement and filling factor of the GRIN pillars to yield maximum LED light extraction. This quest is employing ray tracing simulations to ascertain the best combination of circular, rectangular, and rhomboid stacks and the optimum placement to determine the parameters of a ‘perfect’ GRIN pattern.


The problem that we are grappling with is, in fact, similar to that faced by a restaurant owner who wants to seat as many people as possible in his diner. If they put more tables in the room, they can seat more people – and in our case, by increasing the fill factor of the GRIN pillars, we can increase light extraction. But if the tables are too close, the guests don’t have enough room to sit; and if we put our pillars too close together, light leaving one pillar enters its neighbour. Every restaurant must also cater for a range of people and consider special needs. Translated into our LED design, light emitted close to a sidewall-surface normal requires extra spacing between pillars to prevent emission from reentering the neighbouring pillar.


A very promising aspect of our approach is that it is a ‘one size fits all’ technology because it can be uniformly applied on all LEDs, including various material systems and different orientations. It is not because of modifications to the LED chip by the GRIN process: Only the deposited dielectric materials are etched, and the GRIN patterns should have no impact on the internal efficiency, forward voltage, or leakage current of the device.


We believe that our GRIN technology can be ‘game changer’, thanks to its potential to enable devices to combine incredibly high light extraction efficiencies with an emission profile that can be tuned to match the target application. For example, the designers of LCD panels with direct-lit back-lighting want LEDs with oblique emission, a condition that should be possible with our GRIN technology. Another promise of our GRIN LEDs is the opportunity to eliminate secondary optics, such as lenses and mirrors, thanks to the inherent control over the far-field emission pattern. We hope to exploit this opportunity, plus the other benefits of incorporating GRIN structures in the LED, over the next few years.




Figure 5: Modifying the slope to the GRIN pillars helps to fine tune the farfield emission pattern of the LEDs


Efforts at realizing high light-extraction efficiency LEDs with GRIN patterns are being pursued by Ahmed Noemaun, Frank Mont and Ming Ma from Rensselaer Polytechnic Institute. The group is jointly lead by Jaehee Cho and E. Fred Schubert, and includes collaboration with Gi Bum Kim and Cheolsoo Sone from Samsung LED Company.

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