Getting To Grips With GaN HEMT Degradation
A partnership between researchers in Italy and Belgium is claiming to have reported the first comprehensive analysis of recoverable and permanent degradation in GaN HEMTs.
The team from imec and a pair of Italian institutions – the University of Padova and the University of Modena and Reggio Emilia – has performed a full electrical and optical characterisation of its HEMTs and put forward a model to explain the mechanisms behind recoverable and permanent transistor degradation.
Findings of this research are at odds with the widely held view that reverse-bias degradation just depends on a threshold process. Instead, it has been shown that transistor performance can deteriorate with time.
“For this reason, instead of referring to a ‘critical voltage’, we prefer to define a ‘time to breakdown’, for a given voltage level," explains Matteo Meneghini from the University of Padova.
The HEMTs investigated by the researchers had a critical voltage of 40 V, but showed degradation after 27 hours of operation at just 15 V. (The critical voltage is defined as the voltage that causes the elastic energy in the barrier to exceed a critical value and lead to the formation of defects that cause a hike in leakage current).
“[Our research] forced us to propose a new hypothesis for explaining the origin of permanent degradation: A time-dependent defect-generation and percolation process," says Meneghini. He and his co-workers believe that defects are continuously generated within the semiconductor material when the HEMT is under reverse bias. When the number of defects exceeds a certain value, permanent degradation kicks in, with defects creating a conductive path between the gate and channel.
Researchers from imec, the University of Padova and the University of Modena and Reggio Emilia, have propsed a model for explaining HEMT degradation of GaN-on- SiC HEMTs with a GaN buffer. This model that includes several processes: (1) electron injection under a high electric field from the AlGaN layer to the buffer, where electrons can lose excess energy by emitting radiation (2); (3) electron ionization of deep acceptors in the buffer, which leads to generation of yellow emission (4); and (5), the transfer of an electron from the valence band to a deep acceptor, which leads to the generation of free holes (6).
The team investigated the behaviour of HEMTs with a 22 nm-thick Al0.26Ga0.74N barrier and a Schottky contact made from 40 nm of nickel and 300 nm of gold. These transistors were passivated with 90 nm of SiN and had a gate length and width of 0.5 μm and 400 μm, respectively. Gate-source and gate-drain distances were 1.15 μm and 2.05 μm, respectively. HEMTs were subjected to a step-stress test that involved biasing the device to -15 V for 120 s and monitoring the gate current, before repeating the measurement at the same duration for -20 V, -25 V and so on, until results at -50 V were recorded.
At low voltages, the gate current showed a recoverable decrease during stress time.
When the device was subjected to a 30 V stress voltage, gate current became noisey, indicating that the transistors would soon undergo permanent damage. And when the HEMT was driven at higher voltages, which exceeded the critical voltage, the transistors showed permanent degradation.
To understand the changes in the device during this testing, the researchers collected electroluminescence produced by the HEMT. The wavelength and spectral shape of this emission enabled the team to identify the processes taking place in the device, and ultimately propose a model to explain recoverable and permanent behaviour of the transistor (see Figure).
Using this model, the researchers carried out a two-dimensional simulation that had good agreement with experimental data. Based on this, the team have put forward an explanation for HEMT degradation under different voltages.
They argued that when the device is under long-term stress, defects can be randomly generated in the AlGaN layer, due to either the converse piezoelectric effect or atom displacement that arises due to the high electric field. As this trap density increases, defects can overlap, probably leading to increased gate noise. Over a lengthy period of time, a conductive path, due to defects, can then form between gate and buffer.
With this model, defect generation and percolation govern device degradation. This implies that devices with higher defects should breakdown faster, a prediction confirmed by experiment.
“Now we plan to study the properties of the defective levels generated as a consequence of reverse-bias stress, and to study the dependence of ‘time-tobreakdown’ on the epitaxial quality," says Meneghini.
M. Meneghini et al. Appl. Phys. Lett 100 033505 (2012)