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Technical Insight

Chipmakers prepare for automated 150 mm processes

To bring down the cost of solid-state lighting, chipmakers must move to more efficient, automated, high-yield manufacturing on larger substrates. Foundations to support such a move are moving quickly into place: Wafer geometries and marking conventions for 150 mm sapphire are largely set, and work on standards for equipment hardware and software interfaces are well underway, writes Paula Doe from SEMI.

One of the hallmarks of an industry that is expanding and maturing is that it sets up standards to simplify and streamline the supply chain. This has certainly been the case in the high-brightness (HB) LED industry. Through the same SEMI standards process that developed the manufacturing interoperability standards for the semiconductor, display and PV industries, the LED makers have now largely come to consensus on the basic physical characteristics of 150 mm sapphire substrates, and are starting to wrestle with standards for classifying and counting defects.

“Having a standard will help us to improve the substrate supply,” says Iain Black, Philips Lumileds Vice-President of manufacturing engineering, and co-chair of the SEMI HB-LED standards committee. “It lets suppliers focus on what’s important to improve their product.”

The only downside of standards is that they take time to put together. The first manufacturing standards for the semiconductor and display industries took years to develop, but the photovoltaic and LED sectors have been able to build upon the past experience and make far more rapid progress.  

In November 2011, LED industry stakeholders first got together to collaborate on cost saving opportunities through the SEMI International Standards process. They quickly formed an LED standards committee with task forces addressing sapphire wafers, factory automation interfaces, environmental health and safety, assembly and packaging, and sapphire wafer impurities and defects. There are currently more than 125 participants from the major device makers, equipment makers, and materials suppliers around the world participating in this LED manufacturing standards effort, which has already borne much fruit.

The 150 mm wafer standard that came from this specifies physical geometry like thickness, edge profile and fiducials (objects that provide a point of reference when imaging the wafer); systems and conventions for unique wafer marking; and basic quality requirements, such as the extent of warp and the surface condition. This standard includes 1.0 mm and 1.3 mm thicknesses, with notches and flats, as all four permutations are widely used today. However, with time it is likely that the industry will move towards smaller notches that take the role of fiducials, and thinner wafers.

Differentiating defects

The next major goal for the standards committee is to figure out which wafer defects matter the most for device yields. To do this, a consensus must be reached on how to measure and define these imperfections, so different labs and fabs are talking about the same things. Progress on this front will not just help to improve 150 mm wafers – it will also be applicable to other sizes of sapphire.

Results from an initial survey of experts found general agreement on the importance of multiple types of defects, ranging from surface micro-pits, scratches and cracks; to crystal purity, sub-grains in the crystal structure, and bubbles and gases in or on the wafer. This group is now participating in regular teleconferences to discuss the best way to define and measure these defects. Wider input from the industry is sought by this task force, which aims to forge consensus on basic acceptable commercial levels of tolerances for various types of defect.

The chair of this LED task force on inspection and measurement is Luke Glinski, product manager, sapphire materials, at GT Advanced Technologies. According to him, although there is no doubt that wafer surface quality impacts device yield, it is not clear what the best way is to measure and quantify the size and distribution of these micro pits and scratches or bubbles, and what levels are acceptable.

GT’s own analysis of the impact of sapphire quality on epiwafer yield found that sub-grains and bubbles mattered, but color, purity of the bulk crystal, and etch pit density did not. Sub-grains in the crystal structure, caused by stresses in growth, can cause ridges and valleys during wafer sawing. They are identified subjectively by visual inspection and quantifying them is incredibly tricky.

“It’s a young industry,” says Glinski. “We’re still working these things out. The biggest difficulty is lack of data – it’s not clear what’s important.” However, he is confident that this will change as the team works together. “The companies driving this effort are the companies that have the data on what matters. It will allow suppliers to tighten up on tolerances that matter, and loosen up on tolerances where it’s not important.”

David Reid, Chief Operating Officer of Chongqing Silian Optoelectronics and a co-chair of the SEMI HB-LED standards committee agrees: “It’s important to find the right level of inspection that works for the industry, but not spend time and money on things that don’t matter.”

Philips Lumileds sees more advantages than disadvantages in sharing some of its 150 mm production learnings with the industry through the SEMI standards effort.  “We’ve put considerable effort into our specs to upscale the capabilities of the supply chain,” says Black. “Others can reap the benefits of this work. If we are able to establish decent standards, everyone knows what to chase, and it will drive supply chain capability there much more readily.”

Ahead of the curve?

Ideally, standards are set before a product enters mainstream production. With 150 mm sapphire, it initially appeared that the standard would only just make this deadline. However, it now looks like this standard will be well in place, because investment in next-generation sapphire production capacity has been pushed out. At present, there is still plenty of excess 2-inch and 4-inch capacity, with prices of the latter recently plummeting. According to Eric Virey, senior analyst for LEDs at Yole Développement, 4-inch sapphire sold for typically $45-$50 this summer, making production on this sized platform very competitive.

There are also uncertainties within the industry, which are causing some companies to delay decisions to migrate to larger wafers. Some are also waiting to see if GaN-on-silicon will be soon become a viable option. Others, meanwhile, are reluctant to dispense with the significant boost in brightness that comes from patterning sapphire substrates – this is now used on some 80 percent of all sapphire. However, it very challenging to realize the same high yields when manufacturing LEDs on patterned 150 mm sapphire.

Despite these concerns, the industry will certainly move towards 150 mm sapphire within a few years. This platform will be a key ingredient in tightly controlled, automated high-volume fabs that will drive down chip costs to a level that will allow the LED to take over the general lighting market. According to Yole, 150 mm will pass 25 percent of production on sapphire by 2014 and 50 percent by 2017. Sales should be spurred by falling prices, which have already tumbled from more than $350 a year ago to $220-$270 in summer 2012. While 2012 contract prices are still around $250, most LED makers are targeting prices below $200 in 2013,projects Virey.

Although substrate costs are only a small fraction of the total bill of materials, larger wafers can lead to more efficient production, because they allow better throughput of more LEDs in each process pass. Virey believes that 150 mm wafers could help to reduce front-end processing costs by a quarter compared to 4-inch wafers, per unit surface area, if yields are the same. And yields are in fact much better, according to Black, because the more modern 150 mm equipment has much better process control and throughput. That’s not surprising, given that the semiconductor industry moved on from 4-inch wafers two decades ago.


According to market analyst Yole Développement, 150 mm sapphire will dominate the market by 2017.


LED fab equipment spending has recently dropped a little, and it is expected to be around $2 billion in the coming years.

Interfacing equipment

Alongside classifying defects and determining their impact, the other major goal, in terms of standards, is to determine common equipment interfaces for automated production. “The verge of the transition to 6-inch is the point when companies are starting to think about how adopting some of the automation and process control from the semiconductor industry could help a lot to bring down costs,” notes Julie Chao, Chongqing Silian Optoelectronics VP of technology, and co-chair of the wafer standards task force.

Sales of equipment for LED manufacturing are vastly overshadowed by the long established semiconductor equipment market, which has annual sales of $40 billion. Sales of tools for LED production have surged recently thanks to subsidies in China, but these incentives are now by no means as attractive as they once were, and according to SEMI’s LED fab database, total sales will return to a more sustainable level of ~$2 billion per year. Shipments of new fab equipment will be widely dispersed around the globe.

Given the size and maturity of established semiconductor infrastructure, it makes sense for the LED sector to take as much advantage of this as possible, because this will help the solid-state lighting industry to develop automated production with its tight process control. Production experts must look closely at what needs to be changed and what doesn’t, so that high custom costs for the small market are kept as low as possible, while enabling efficient volume production at improved yield.

Typically, these discussions are driven by equipment and material makers, who see common issues and have the best grasp of the technical details. However, at a later stage, input is sought from many device makers. This can happen at the SEMI standards meetings.

 “SEMI standards committees are about the only place where the major equipment and material suppliers are all in the same room at the same time discussing common solutions for the industry—it’s a unique situation for direct competitors,” says Chris Moore, CEO of SemiLab AMS, and another co-chair of the standards committee.

Equipment developed for handling 150 mm silicon will have to be adapted to accommodate sapphire, because this is thicker and has a more pronounced bow. This includes different cassettes for automated handling and transport between tools.

The automation standards task force has decided to make no change to the external dimensions of standard 25-wafer cassettes, because this will allow the same storage racks and other assorted infrastructure to be used. However, the thicker, more bowed sapphire wafers will need fewer, wider pockets inside the cassettes, to allow enough room for robotic handlers to move them easily in and out of the slots.  Discussions are ongoing regarding the optimum number of pockets. If 16 wafers slots are used, this maximizes cassette capacity for best throughput, but it also means that the majority of equipment software used to handle and track wafers requires revision to handle the new spacing. Switching to 12 or 13 wafer slots instead – every other space of the 25-wafer cassettes – is easy to handle with current software, but necessitates that batch equipment, like MOCVD tools, is fitted with another port for most efficient loading. Using a combination of the two sizes (12 or 13 and 16) is possible, but it would require the addition of extra steps to shuffle the wafers from one size of cassette to the other, and it would also complicate storage and transport issues. The wafer automation taskforce is currently soliciting input from across the industry on the preferred way forward.

Another issue is to determine the best software for getting the data to monitor yields out of the equipment .  Automation software experts are looking at the issue and their view is that a system based on SECSII/GEM will best serve the LED sector data needs, both now and in the future. However, there may come a time when Interface A is needed, due to demands for higher bandwidth for enhanced engineering data.


China dominates LED fab equipment spending, but total slaes to this nation are now in decline.

It is clear that those within the LED industry will need to customize SECSII/GEM so that it can track multiple wafers on each graphite process tray within the MOCVD tool by wafer, position and process. The software working group is now considering whether the simpler 200 mm-version of SECSII/GEM, which is commonly used on smaller-wafer tools, has enough capability for the levels of data needed to track LED production. The alternative is to tap into the more advanced capabilities of the 300 mm-version of the software.

This task force is currently polling users on what data they most need out of the tools. Armed with that information, equipment suppliers will be able to extract and format that data in a consistent way to feed into the device makers’ analysis systems. Doing this will reduce the cost of the tools and simplify the integration process for everyone.

Another issue is how to extend the existing semiconductor safety standards to the LED manufacturing process, with its MOCVD tools and pyrophoric gases. A working group in Taiwan, driven by Epistar and TSMC, is specifying the best practices for installing and operating production equipment to a common worldwide standard. This effort, plus those of the other task forces, is sure to play an important role in driving LED consistency and yield up, costs down, and ultimately helping to drive a solid-state lighting revolution.

To learn more, or to join the industry volunteers from around the world working on forging consensus standards for sapphire wafer parameters, automated equipment interfaces, wafer defect measurement, safety, and other enablers of next generation low-cost LED manufacturing, please see http://semi.org/en/standards/P041367, or contact Paul Trio, ptrio@semi.org.







 

 



 

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