Info
Info
News Article

GaN-on-silicon Gathers Momentum

In the RF and power electronic sectors, a silicon foundation is a great way to increase the competitiveness of GaN devices




RICHARD STEVENSON REPORTS

A fundamental questionfaced by all the makers of GaN chips is this: What substrate should I use for the foundation of my device?

If lasers are being made, there is only one option: A GaN substrate must be used, because this is the only platform that enables the growth of very low defect density epistructures required to form a working device. But for the makers of LEDs, power electronics and RF devices, this native platform is often ruled out, due to its limited availability, small size and high cost – a 2-inch GaN substrate can sell for thousands of dollars.

For these chipmakers, there are three common substrates to choose between: sapphire, SiC and silicon. Sapphire is the first choice for LED manufacturers, thanks to its relatively low cost and transparency, but its poor heat spreading capability has encouraged many developers of power and RF electronic devices to build their devices on SiC or silicon. Of these two, SiC has the superior thermal conductivity, but it is far more expensive. So several firms are working within the thermal limitations of silicon, dealing with its significant lattice and thermal mismatches with GaN, and using this to foundation to develop power and RF devices. This approach may not be easy, but the rewards include wafer processing in depreciated 150 mm and 200 mm lines, which open the to the door to manufacture of very competitively priced products.

Such devices were discussed in a talk given by Philip Roussel, an analyst at Yole Développement, at the recent CS International conference. He is anticipating tremendous growth for all forms of GaN RF and power devices, including a ramp in shipment of products built on a silicon foundation.

Roussel believes that the RF GaN market is current valued at $224 million, should increase at a compound annual growth rate of 15 percent between 2015 and 2020, and is expected to be valued at $565 million by 2020.

Meanwhile, the GaN power electronics market will rocket by a compound annual growth rate of 91 percent over that time frame, blossoming from just $24 million next year to $600 million by the end of the decade. And sales of GaN-on-silicon wafers for power electronics market, which were worth just $2 million in 2010, should grow to $18 million this year and by 2020 will be valued at $318 million.

Some of these GaN-on-silicon epiwafers will be grown in-house, while others will be produced at external foundries.

Roussel weighed up the pros and cons of both approaches. He pointed out that firms buying in their epiwafers benefit from not having to invest in expensive MOCVD tools, while still being able to make products that differ from their competitors, due to differences in front-end steps and device design. However, companies that are fully integrated have the advantage of full control of their intellectual property, but to do this they require strong research and development efforts to bring their products to market, due to the need to develop both a growth process and a device.

Vertical integration

One of the pioneers of the fully integrated approach is the power electronics giant International Rectifier. At CS International, Mike Briere detailed the company’s development of GaN-on-silicon power devices on large diameter substrates.

“Ten year’s ago we realised that silicon was running out of gas," revealed Briere, who explained that back then the company was considering a wide range of other materials, including carbon nanotubes and diamond.

The conclusion of this quest for a new material that would combine superior performance with the ability to satisfy the demands of the market was that GaN would lie at the heart of the next generation of power devices.

At that stage, the development team did not know whether threading dislocations would be an issue, whether GaN-on-silicon could be cost effective, or whether it was possible to carry a high enough current in the two-dimensional electron gas.

With the benefit of hindsight, it is clear that these issues have been addressed, and that the engineers at IR have made much progress: the breakdown voltage for III-N epiwafers has increased from 50 V to more than 1kV; the process for producing crack-free epiwafers has been extended from a 1 m-thick film on 100 mm silicon to a 5 m-thick film on 200 mm silicon; yield has rocketed from below 1 percent for devices with a gate width of 1 mm to more than 80 percent for a HEMT with a gate width of around 1 m; saturation current has rocketed from typically 300 mA to in excess of 300 A; and dynamic on-resistance, which can overshadow the static on-resistance, has been slashed from more than 1000 percent to less than 10 percent. What’s more, the reliability, determined by a 480 V bias stress, has lengthened from a minute or so to more than 10,000 hours.

All these gains have enabled IR to transfer its processes used to develop GaN-on-silicon HEMTs to a high-volume 150 mm production line. The devices are formed with compositionally graded AlGaN layers, which bridge the different in lattice constants and address the thermal mismatch between GaN and silicon. This epitaxial technology is protected by a strong patent portfolio, which includes intellectual property acquired from Nitronex.

During his presentation, Briere also revealed the requirements for a commercially viable 600 V HEMT, which include an epiwafer cost of below $3 cm-2, so that it is comparable to that for silicon. Other requirements are a current leakage of less than 0.1 A/mm, an Ion/Ioff ratio greater than 106, a current handling capability of more than 350 A cm-2, and a bow across a 150 mm epiwafer of less than 20 m.

Additional requirements include a manufacturing process that realises a yield of more than 80 percent for 10 mm2 devices, which would have to be produced in lines capable of running tens of thousands of wafers per week, in order to support market demand. What’s more, the GaN device would have to outperform the silicon equivalent, in terms of cost, by a factor or at least two-to-three.

IR is focusing on these targets. Using standard silicon substrates, it is capable of producing 150 mm epiwafers with a warp below 20 m – and 200 mm versions, which will be used when 150 mm lines are no longer commonplace, that have a warp below 40 m. The ratio of Ion/Ioff, for a 30 V HEMT with a gate width and length of 850 mm and 0.3 m, is greater than 1012, while the leakage is below 100 nA; and the breakdown voltage for its 600 V device is more than 1.4 kV. “That’s not overly designed – that’s properly designed," claimed Brier, who argued that devices should operate at half their critical field or less to ensure excellent long-term performance.

To form a normally off device, engineers at IR pair the normally on GaN transistor with a silicon diode to create a component with a far lower reverse recovery than a silicon switch. The penalty to pay for this is a decline in performance, but this falls by less than 10 percent.

Even with this reduction in performance, the 600 V cascaded GaN device still delivers a far better performance than a best-in-class silicon super-junction FET from 2012: for a DC-to-DC converter with a 300 V input, 30 V output and a 400 kHz switching frequency, the wide bandgap device delivers a 17 percent gain in efficiency at 10 percent load and a 3 percent improvement in efficiency at full load.

Briere also compared an IR GaN device with a silicon IGBT, considering conditions of a power of 400 W at 6 kHz. Losses for the IR device were below 4 W at 2 A, making it three-to-four times as efficient as the silicon equivalent. What’s more, the GaN device does not require a heat sink, and takes up one-tenth of the volume of the silicon IGBT.

Outsourcing

If the makers of GaN RF and power devices wish to outsource the MOCVD deposition process, they can consider turning to epiwafer provider EpiGaN.

This imec spin-off is just starting a capacity expansion programme, and is currently offering 150 mm GaN-on-silicon wafers for high-voltage products, plus GaN-on-silicon and GaN-on-SiC wafers with diameters of 75 mm and 100 mm for RF products.

Speaking at CS International, co-founder and CEO Marianne Germain claimed that one of the strengths of EpiGaN is its unique in-situSiN passivation process, which trims the dynamic on-resistance and improves device reliability, thanks to optimal surface control. “If the SiN is on top, and the silicon is on the bottom, it’s very close to what the silicon industry knows," explained Germain, who has worked with colleagues to ensure that the start-up’s epiwafers are suitable for processing within the silicon industry.

EpiGaN, like IR, has one eye on the future, having already developed growth processes for 200 mm silicon. These epiwafers are suitable for making high-voltage devices and have a SiN cap thickness uniformity, in terms of a standard deviation, of 1.7 percent for a 39 nm-thick film; while the 24.4 nm-thick barrier in this structure has a standard deviation of just 0.7 percent.

For RF devices on silicon, EpiGaN is combining an AlN barrier that maximises polarisation charge with its in-situSiN deposition process. Germain claimed that with this approach it is possible to control surface charges and stabilise the highly strained barrier. By exceling in these areas, devices benefit from a high electron-mobility and the absence of leakage through the barrier.

One of EpiGaN’s epiwafer structures involves a 3 nm-thick SiN cap and a 6 nm-thick AlN barrier. This leads to a sheet carrier density of 2 x 1013 cm-2 and a mobility of 1250 cm2 V-1 s-1, and it enables the fabrication of devices with a transconductance of 600 mS/mm. Values for the cut-off frequency and maximum oscillation frequency are 85 GHz and 103 GHz, respectively.



EpiGaN’s development of GaN-on-silicon wafers for RF and power electronics products is led by co-founder and CEO Mariane Germaine.


Working with a supplier

One company receiving shipments from EpiGaN is French firm Ommic, which is developing a 100 nm GaN-on-silicon millimetre-wave foundry service.

Speaking at CS International, Ommic CEO Marc Rocchi explained the rationale for this move: “Gallium arsenide will be dead. So, in our foundry, we are moving from gallium arsenide to gallium nitride." Rocchi argued that the migration from GaAs to GaN allows an increase in the operating voltage of the device, which is turn leads to higher operating frequencies.

Ommic has chosen to work with GaN-on-silicon, rather than GaN-on-SiC, because this material can be sourced within Europe. Even though the thermal conductance of silicon is not as good as SiC, it is still about three times higher than that of GaAs, and is thus suitable for making devices producing up to 20 W.

The engineers at Ommic are looking to replace all their GaAs processes with GaN-on-silicon for frequencies up to 100 GHz, while cutting the cost per unit area. The first step towards this is to replace a 135 nm GaAs power process, D01PH, with a 100 nm GaN-on-silicon process called D01GH.

With the D01GH process, the ohmic source and drain contacts are added by MOCVD re-growth of heavily n-doped GaN, which is covered with a Ti/Pt/Au stack. These regrown ohmic contacts − which enable a high transconductance in devices that can also feature a ‘mushroom’ 100 nm or 60 nm gate – have, according to transmission line measurements, resistances of just 0.17 Ωmm between the metal and two-dimensional electron gas, and 0.02 Ωmm between the metal and n-doped GaN. Devices resulting from these processes have a source-to-drain current of 650 mA/mm, a maximum transconductance of 600 mS/mm, values for fT and fmax of 100 GHz and 180 GHz, respectively, and a saturated power output of more than 2.5 W/mm at 30 GHz.

Rochi believes that this should enable GaN-on-silicon devices to replace those made from GaAs and InP in applications requiring 1 W at 94 GHz, 6 W at 45 GHz and 12 W at 30 GHz.

Efforts by engineers at Ommic, as well as those at EpiGaN and IR, will help to drive growth in the sales of GaN-on-silicon devices for power and RF applications. And if Roussel from Yole Développement has his market prediction correct, revenues will rocket throughout the remainder of this decade.



Ommic CEO Marc Rochi believes that GaAs does not have a role to play in the high-frequency RF markets of tomorrow. The company is developing a 100 nm GaN process, using epiwafers supplied by EpiGaN.




AngelTech Live III: Join us on 12 April 2021!

AngelTech Live III will be broadcast on 12 April 2021, 10am BST, rebroadcast on 14 April (10am CTT) and 16 April (10am PST) and will feature online versions of the market-leading physical events: CS International and PIC International PLUS a brand new Silicon Semiconductor International Track!

Thanks to the great diversity of the semiconductor industry, we are always chasing new markets and developing a range of exciting technologies.

2021 is no different. Over the last few months interest in deep-UV LEDs has rocketed, due to its capability to disinfect and sanitise areas and combat Covid-19. We shall consider a roadmap for this device, along with technologies for boosting its output.

We shall also look at microLEDs, a display with many wonderful attributes, identifying processes for handling the mass transfer of tiny emitters that hold the key to commercialisation of this technology.

We shall also discuss electrification of transportation, underpinned by wide bandgap power electronics and supported by blue lasers that are ideal for processing copper.

Additional areas we will cover include the development of GaN ICs, to improve the reach of power electronics; the great strides that have been made with gallium oxide; and a look at new materials, such as cubic GaN and AlScN.

Having attracted 1500 delegates over the last 2 online summits, the 3rd event promises to be even bigger and better – with 3 interactive sessions over 1 day and will once again prove to be a key event across the semiconductor and photonic integrated circuits calendar.

So make sure you sign up today and discover the latest cutting edge developments across the compound semiconductor and integrated photonics value chain.

REGISTER FOR FREE

VIEW SESSIONS

Info
×
Search the news archive

To close this popup you can press escape or click the close icon.
×
Logo
×
Register - Step 1

You may choose to subscribe to the Compound Semiconductor Magazine, the Compound Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in:
 
X
Info
X
Info
{taasPodcastNotification}
Live Event