PKU team advances III-nitride complementary logic
Researchers from Peking University (PKU) have monolithically integrated 2DHG-based InGaN p-FETs with 2DEG-based GaN n-FETs, achieving robust III-nitride complementary logic (CL) building blocks for high-frequency power management integrated circuits (ICs) and harsh-environment electronics.
Wide bandgap III nitride semiconductors hold enormous promise for next generation power management ICs and harsh environment electronics. However, practical CL implementation has long been hindered by inefficient p type impurity doping in III nitrides. This work delivers a complete set of III-nitride CL building blocks, including inverters, logic gates, latches and the first GaN CL 6T SRAM cell.
The inverter delivers full rail to rail swing with a maximum voltage gain of 154.1 V/V, while a five stage ring oscillator achieves a record-short propagation delay of 10.4 ns per stage. Critically, CL buffers have been monolithically combined with high voltage GaN power transistors, demonstrating stable switching under a 400 V bus voltage and validating a clear route toward monolithic GaN power ICs.
While mainstream silicon technology benefits from efficient p-type and n-type doping, wide-bandgap III-nitride semiconductors have long struggled with low-efficiency p-type impurity doping, creating a fundamental bottleneck for high-performance p-channel transistors and CL circuitry. Although AlGaN/GaN heterostructures exploit intrinsic polarisation to form high-mobility 2DEG for n-FETs, realising high-performance p-FETs compatible with mainstream E-mode GaN HEMT platforms has proven challenging.
To overcome this bottleneck, a team led by Jin Wei at Peking University developed a p-InGaN/p-GaN/AlGaN/GaN heterostructure. The p-InGaN layer plays a distinct dual role. For the p-FET, it is designed to introduce a net negative polarisation charge at the p-InGaN/p-GaN interface, enabling the formation of a high-density 2DHG channel without requiring thermal activation of acceptors. This enhanced 2DHG allows the polarisation-doped E-mode InGaN p-FET to reach a high current density of 20.4 mA/mm and a large ION/IOFF of 1.46 × 108. Simultaneously, for the n-FET, the p-InGaN layer serves as a p-type gate layer that sustains the effective depletion of the 2DEG, supporting stable E-mode operation.
Leveraging this platform, the researchers successfully monolithically integrate the polarisation-doped InGaN p-FETs and GaN n-FETs. They demonstrated a complete set of III-nitride CL building blocks, including inverters, NAND and NOR gates, RS latches, a five-stage ring oscillator, and a 6T-SRAM cell.
The inverter exhibits robust full rail-to-rail operation, with both low and high noise margins sufficiently large to indicate strong immunity to noise, particularly relevant for high-frequency power-management systems subject to electromagnetic interference. It also achieves a high maximum voltage gain of 154.1 V/V and stable operation up to 200 °C. The ring oscillator delivers a record-short propagation delay of 10.4 ns per stage, underscoring its potential for high-frequency switching applications.
Notably, this work reports the first implementation of a GaN-based CL 6T-SRAM. Furthermore, the team monolithically integrates these CL buffers with high-voltage GaN power transistors, demonstrating stable switching under a 400 V bus voltage.
Future efforts will focus on optimising device design to further boost the current density of InGaN p-FETs and improving fabrication uniformity, paving the way for high-density, smart GaN power integrated circuits.
Reference
Jingjing Yu et al., Science Advances 12, eaec4563 (2026)
