Renesas unveils 650V GaN in dual-side cooled package
Renesas has launched the industry's first 650V GaN device with dual-side cooling for high-density power conversion in 800V high-voltage DC (HVDC) AI data centre architectures.
The new TP65H020G4PLSGBD D-Mode device delivers 20 mΩ on-resistance — one of the lowest in its class — in an ultra-compact, dual-side-cooled (DSC) PQFN package that handles more power in less space. Renesas is currently sampling the device to major AI Datacentre OEMs and ODMs.
Built on Renesas' Gen IV Plus GaN architecture, the device is purpose-built for the megawatt-scale demands driving next-generation AI data centres supporting up to 700V operation. It targets the 800V DC/DC intermediate bus converter (IBC) stage that steps down to 48V, 12V or 6V, along with the battery backup (BBU) and capacitor bank (CBU) stages of the sidecar power rack.
As rack power climbs from roughly 120 kW toward megawatt scale, space and heat have become critical factors in sustaining the power level. Unlike conventional top-side-cooled packages, the new device dissipates heat from both top and bottom, lowering top-side thermal impedance by 10 percent. Its 8 x 8mm PQFN footprint is also 57 percent smaller than the existing 10 x 15mm TOLT package.
The device incorporates the full strength of Renesas Gen IV Plus 650V GaN technology: low gate charge and output capacitance, a built-in freewheeling diode with minimal reverse recovery and a high threshold voltage that runs without a negative gate bias. Engineers can drive it with a standard silicon gate driver, switch into the MHz frequency range to minimise passive components and cut overall BOM cost without requiring a specialised E-mode driver.
"Customers building megawatt-scale AI data centres are running out of board space and thermal headroom before they hit their power limits," said John Wiggenhorn, senior product line director of High-Voltage GaN at Renesas.
"With the industry's first dual-side-cooled 650V GaN, we cool the device from both sides and cut the footprint significantly, so designers can move more power through the intermediate bus without redrawing the board or adding more cooling hardware. And because it keeps the operational simplicity of the silicon gate drive customers already use, it's an extremely easy upgrade."
The new dual-side-cooled (DSC) PQFN package is defined in collaboration with major AI infrastructure customers, enabling an industry-standard footprint for sourcing flexibility. When paired with Renesas AUX controllers, gate drivers and MCUs, the GaN device creates a one-stop-shop power solution for OEMs, ODMs and hyperscalers moving to 800V architectures.
Renesas has already validated the approach in silicon. A 6kW, 800V-to-48V LLC DC transformer (DCX) reference design built on the new device and controlled by a Renesas RA6T3 MCU reaches a power density of 2.6 kW/in³ with per-module testing measuring full-load efficiency 0.21 percent higher than an equivalent TOLT-based board.
The smaller package also saves PCB space and enables a better-matched layout across the FETs. 800V-to-12V and 6V DC/DC IBC reference designs also leverage the new DSC 8x8 platform, delivering similar enhanced performance, scalability and power density levels.
The TP65H020G4PLSGBD is sampling today. Mass production is planned for mid-2027.
