A*STAR and Soitec announce SiC research collaboration
Collaboration wil use Soitec's Smart Cut technology and IME’s pilot production line to create 200 mm diameter SiC semiconductors substrates
The Institute of Microelectronics (IME) at the Agency for Science, Technology and Research (A*STAR) and the semiconductor materials firm Soitec have announced a research collaboration to develop next-generation SiC semiconductor devices to power electric vehicles and advanced high-voltage electronic devices. Under the collaboration, the parties will leverage Soitec’s proprietary technologies such as Smart Cut and IME’s pilot production line to create 200 mm diameter SiC semiconductors substrates.
The joint research will contribute towards developing a holistic SiC ecosystem and boosts semiconductor manufacturing capabilities in Singapore and the region. The research collaboration is planned to run until mid-2024, and aims to achieve the following outcomes:
First to develop SiC epitaxy and MOSFET fabrication processes for Smart Cut SiC substrates to produce higher quality microchip transistors with less defects and enhanced yield during the manufacturing process; and second to establish a benchmark for SiC power MOSFET devices fabricated on Smart Cut SiC substrates and demonstrate the advantages of the process with conventional bulk substrates
“This joint research between A*STAR’s Institute of Microelectronics and Soitec to develop next-generation semiconductor devices using innovative technologies is made possible by both organisations’ deep capabilities in R&D,” said Terence Gan, executive director of IME. “We look forward to working together with Soitec to add value to the local R&D ecosystem and the growing pool of SiC players in the semiconductor industry,” he added.
“This is a great opportunity for us to partner with Singapore’s Institute of Microelectronics and demonstrate SmartSiC substrate’s scalability to 200mm,” said Christophe Maleville, CTO and senior executive VP at Soitec. “The collaboration paves the way for the development of advanced epitaxy solutions to produce higher quality SiC wafers with energy-efficient characteristics, given the exciting potential of this material. As the main beneficiaries of this new process, the semiconductor ecosystem in Singapore will be given the opportunity to validate the superior energy efficiency of the SiC wafers produced through our collaboration.”