Revolutionising microLED displays with nanowires

Large silicon wafers populated with blue-emitting nanowires and colour-converting quantum dots offer a compelling approach to making microLEDs for many types of display.

BY PIERRE TCHOULFIAN AND CO-WORKERS FROM ALEDIA

Its hard to imagine a day that passes when we don’t look at a screen. They are in our homes, incorporated into TVs, laptops and tablets; and when we go out to the shops we come across them in the form of videowall displays, and in consumer electronics stores promoting the next must-have tech, such as virtual/augmented reality displays. And even when we try and get away from it all, by heading to the beach or the hills, we’re unlikely to forget our smartphones and smartwatches. The reality is that screens are everywhere, so it’s not surprising that they are responsible for a substantial industry, netting around $120 billion every year.

One part of this industry facing significant challenges is the reasonably large-size display. To enable short-viewing-distance indoor applications, LED videowall displays and luxury TVs need to move to a smaller pitch. However, it’s far from easy to integrate three different colours of pixel, plus driving circuitry, on a backplane. But success on this front is most welcome, as it could also breathe new life into mid-size displays. Today’s OLED and LCD technologies are limited in terms of their brightness, contrast and energy efficiency, and they struggle to scale beyond 90 inches.

The good news is that there is a unique, cost-effective technology that has been rapidly improving over the last years and could penetrate these and other segments of the display market: the GaN microLED. It is a descendant of the traditional GaN-based LED, now dominating the general lighting market, thanks to its high energy efficiency (75 percent in the blue), brightness and reliability.

An obvious difference between the conventional LED and the microLED is size. For general lighting, 0.35-1 mm chips are typically used, assembled individually in packages with a size of several millimetres. Meanwhile, to make displays from microLEDs, these devices have to have a high efficiency, a small size – typically less than 10 µm – and be relocated using an unpackaged chip assembly process, which moves millions of them with a collective high accuracy. In addition to this high-yield transfer technique, there needs to be a suitable electrical connection technology.

The most common form of GaN microLED is that with a 2D architecture. This design enjoys strong momentum, with many of its developers hoping it will deliver on its promise to provide a significant improvement in power consumption over LCD and OLED technologies. However, as the size of the 2D microLEDs falls, so does its efficiency. One option for overcoming this issue is to optimise the post-etching passivation of the GaN sidewalls. But our team at Aledia is convinced that there’s an even better alternative: to switch to 3D microLEDs, employing GaN-based nanowires as light emitters (see Figure 1).

Figure 1. Aledia’s technology is based on using 200-300 mm silicon wafers, which provide the foundation for making 3D microLEDs with micron-range dimensions.

Since founding in 2012 as a spin-out of CEA-LETI, we have continued to develop our unique and radical GaN-on-silicon 3D microLED technology at our site in Grenoble, France, where our team has grown to 220 employees. Working together, we have developed a cost-effective technology that’s compatible with 200 mm and 300 mm silicon wafers and has assets that include a high level of manufacturability and easy integration with electronics. Supporting our technology, which enables us to access completely new display formats based on microLEDs, are 250 patent families. While the technology is novel, the fabrication processes are not, with production able to leverage existing equipment and technologies from the display, semiconductor and LED industries.

The allure of nanowires
We begin production of our microLEDs with the growth of the blue emitting nanowires. They are transformed into devices using front-end chip processes that have been developed in standard 200 mm microelectronic foundries. To produce green and red emitters, we use advanced colour conversion, based on quantum dot patterning technology. Depending on our product’s particular requirements, we produce chips populated with a couple to hundreds of nanowires. All these devices benefit from a built-in redundancy that’s at the heart of our cutting-edge technology. Read on to discover more about the key aspects of our fascinating technology and its product opportunities.

Over the last ten years, we have mastered the MOCVD of core shell nanowire LEDs, which we can grow on 200 mm and 300 mm SEMI-standard silicon substrates that are 725 µm and 775 µm thick, respectively. There’s an LED epitaxial stack structure inside each nanowire (see Figure 2 (a)). This means that each nanowire is a microLED, with no need to etch through the quantum wells of the LED structure before forming contacts, an undesirable but essential requirement for 2D counterparts. Thus, there is no need to add a passivation layer to ensure good efficiency.

Figure 2. (a) Aledia’s microLEDs are based on core-shell nanowires. (b) Transmission electron microscopy cross-sectional images show excellent crystalline quality. (c) Top-view scanning electron microscopy/electron-beam induced current signals highlighting the p-n junction position.

Scrutinising our nanowires with a transmission electron microscope reveals that they are free from defects, including threading dislocations (see Figure 2(b)). This is a great asset for our active regions. From this form of microscopy, we know that the dislocation density is below 1 x 10⁶ cm^-2. The key point is that our microLEDs have a perfect active area. That’s not the case for 2D microLEDs, which are held back by ‘bulk defects’, as well as surface local defects that arise when patterning the 2D epilayer.

Another advantage of our approach to producing microLEDs is the relatively short growth time. Epitaxy for our nanowires takes less than 3.5 hours, which is about half the time it takes to produce a typical planar LED heterostructure. This quick growth, which delivers cost savings, results from the absence of thick AlGaN-based buffers. In a typical planar LED, this thick buffer is needed to master the stress created during growth. Stress comes from a far higher coefficient of thermal expansion for GaN than silicon – this induces cracks in the GaN crystal as it cools down. Fortunately, that’s not an issue for us. Thanks to a wire-based geometry, which is not continuous over the wafer surface, no stress is created in the GaN crystal. This ensures a perfect structure, regardless of wafer diameter and growth conditions.

Figure 3. (a) A wall-plug efficiency close to 300 mW/W at a low current density (0.2 A/cm²), and (b) electroluminescence of an assembly of 10⁴ wires, with all the wires lighting-up. (c) First blue electroluminescence on a 300 mm wafer.

Like any other developer of LEDs, over the years we have made continuous improvements to the internal quantum efficiency and the light extraction efficiency of our devices. Our approach to this has involved overcoming obstacles that developers of planar LEDs don’t face, as we have had to apply different characterisation techniques, because methods such as secondary ion mass spectrometry are incompatible with our structures. To map the electric field inside the p-n junction of our devices, we use an electron-beam induced current approach, which has enabled us to determine the position of the junction and quantify the doping levels (see Figure 2 (c)).

Measurements of the efficiency of our devices demonstrate that our nanowire technology can address display applications (see Figure 3 (a)). When our nanowires are collectively driven in parallel, wall plug efficiency is close to 300 mW/W. Applying a voltage of just 3 V ensures that all the nanowires in an array of ten thousand light up (see Figure 3 (b)). The implication is that our nanowire light-up yield is above 99.99 percent, a valuable asset for the high demands of display manufacturing, where there is absolutely no tolerance to pixel defects.

Figure 4. (a) Current density versus voltage (J-V) and (b) normalized external quantum efficiency versus current density (EQE-J) curves showing the superimposition of electro-optical behaviour whatever the device size. (c) EQE versus die size behaviour for 2D LEDs versus 3D LEDs.

One of our current goals is to transfer our epitaxial process to a standard 200 mm diameter high-volume manufacturing tool. We have every confidence we shall succeed in this endeavour, having already scaled our technology to large silicon wafers, leading to a world-first light-up on 300 mm silicon (see Figure 3 (c)). For this triumph, we grew our nanowires on (111) SEMI standard silicon wafers with a thickness of 775 µm. Our resulting epiwafer had a bow below 50 µm, ensuring full compatibility with post processing in a standard microelectronic foundry.

There are a number of compelling reasons why we have devoted such effort to transferring our technology to 300 mm wafers. There are several intrinsic advantages, including lower manufacturing costs, access to advanced CMOS electronics for LED direct bonding (nodes below 60 nm only exist in fabs with 300 mm lines), and significantly reduced costs for chip transfer.

Figure 5. (a) Colour conversion at different scales: cm to µm and (b) for a 110 µm pixel. (c) Colour coverage obtained using blue nanowires and green and red converted sub-pixels. (d) Photon conversion efficiency for green and red in the 110 µm pixel.

We are encouraged by our measurements of current density versus voltage for microLEDs with 1, 4, 16, 64 and 256 nanowires (see Figure 4 (a)). Plots for all these devices, realised from the same location on a wafer, perfectly superimpose, showing that the size of the microLED has no impact on its performance. These devices also exhibit a low level of reverse leakage and good rectifying behaviour.

Plots of external quantum efficiency as a function of current density are also unaffected by device size (see Figure 4 (b)). Efficiency peaks at 0.2 A cm^-2, an ideal value for direct view displays, because microLEDs have to operate at low current density with a large grey scale range (bit depth). Note that size-independent efficiency is not found in 2D LEDs, with efficiency falling for blue microLEDs with dimensions below 30 µm (see Figure 4(c)).

Our device with a single nanowire can be considered to be the smallest microLED. This emitter, just 1.5 µm in diameter, has a state-of-the-art efficiency. Such characteristics inspire a re-thinking of microLED display economics.

For our technology to serve in displays, as well as blue light emitters, we need those that emit efficiently in the green and red. To produce high-performance, vibrant green and red sub-pixels, we use a patternable colour-conversion technology that’s based on cadmium-free quantum dots. Processing takes place at the wafer-level, using standard microelectronic tools. By adopting this approach, we can pattern from the centimetre-scale down to just 3 µm (see Figure 5 (a)). Our sub-pixels are defined with a high spatial resolution (Figure 5b), and through the use of specific designs we realise appropriate inter- and intra-pixel contrast. Colour conversion provided by the dots is excellent, in terms of both wavelength stability and reproducibility. Illustrating this point, we have obtained a single-wavelength bin after conversion on a full 200 mm wafer, despite variations in the blue emission wavelength. The control over colour has enabled us to record a colour point with a DCIP3 overlap of more than 90 percent (see Figure 5 (c)). We expect further gains on this front in the short term, leading to 100 percent DCIP3 coverage. We can already access raw quantum dot material with a quantum yield of around 75 percent.

Figure 6: Aledia 3D technology can address both large displays (greater than 60-inch) and mid-size displays.

For our display technology, one important metric is the photon conversion efficiency, defined as the proportion of impinging blue photons converted into extracted green/red photons. This metric depends on the level of absorption of blue light from the quantum dot resist, the quantum yield, and the possible reabsorption of green/red light. We are continuing to make progress, and today we are realising green and red conversion efficiencies of more than 40 and 50 percent, respectively, for 55 µm by 55 µm subpixels (see Figure 5 (d)).

The performance we are realising with our nanowire microLEDs enables us to address the requirements of different display markets. In the remainder of this article we will focus on the demands for mid-size and large-size displays (see Figure 6).

Figure 7. (a) Four-contact RGB pixels (160 µm x 160 µm). Bottom view highlights the four bumps, top view demonstrates the working pixel under electroluminescence and the side view illustrates the pixel architecture with a protective glass layer.

Improving video walls
For large displays, like video walls, there’s a need to realise a finer pitch, especially for 4K resolution in a 110-inch display – that requires a pitch of 0.625 mm. With this type of display space is limited, while the driving circuitry is becoming more and more complex to handle.

To support this type of display, we have introduced a 160 µm by 160 µm single-chip RGB LED called the LD0001 (see Figure 7). This device integrates blue-emitting nanowire technology, with more than a hundred nanowires in each pixel, with quantum dot conversion for realising green and red emission. The product also has four bumped pads to support electrical interconnections. Due to current flowing in GaN material for all three colours, they have consistent thermal and electrical behaviour. Just a single bin for both the green and the red emitters is possible, thanks to tremendous wavelength stability for the quantum dots.

Our RGB pixel can be transferred to a backplane – it could be a TFT or a PCB – that provides the driving circuitry. Thanks to the use of an integrated pixel, just a single transfer is needed from the wafer to the backplane. That’s a big advantage over the standard pick-and-place approach for 2D LEDs that requires three transfers – one per colour. Due to the high number of nanowires in each subpixel, there is a built-in redundancy with our microLEDs, reducing pre-assembly sorting, lowering defectivity, reducing repair and ensuring very good reliability (there is no cataleptic failure).

Figure 8. Direct mass-transfer, involving the transition of microLEDs from the source wafer to the TFT backplane.

Another strength of our technology is that it enables more efficient driving of the display. The voltage drop in the output stage of a TFT-based display typically exceeds 4 V, resulting in more than half the panel power being wasted. Due to this, it is advantageous to connect, in series, two or three groups of microLED per subpixel. In such a configuration each subpixel has an operating voltage that is higher by a factor of two or three. Therefore, to produce the same brightness, the driving current of the LED should be two or three times lower. In turn, this dramatically reduces joule losses in the lines, combats voltage drop, and slashes the power wasted in the TFT without sacrificing the footprint advantage.

There is much interest in what is referred to as the ‘smart pixel’, which can be realised during the co-integration of the light-emitting module with the driving module. We are developing such a technology, which involves monolithic stacking, at the wafer level, of the RGB LED and the CMOS controlling/driving circuit. Our first product incorporating smart pixels will be the SP1001. It will integrate three-colour drive electronics with an on-chip memory of 19 bits of data per colour. Other features will include pulse width modulation driving, an additional 7 bits for intensity trimming, and an idle current of just 12 nA. As only four interconnections are required, the SP1001 is able to employ an active-matrix architecture with a two-metal layer PCB and a pitch down to 0.3 mm.

Targeting mid-size displays
Our technology is also a compelling candidate for mid-size displays, such as laptops and smartphones. For these displays, we have a product built on 200 mm or 300 mm wafers, and employing vertical microLEDs with single nanowires and 3.5 µm by 3.5 µm chips. We are developing a direct mass-transfer method for moving these vertical microLEDs, at the right pitch for the TFT, directly from the wafer to the TFT backplane, without any manipulating (see Figure 8).

Using on-panel post-processing, we can add a top contact. Our technology ensures precise colour conversion and has additional strengths that include: excellent light extraction; contrast enhancement; and a redundancy strategy (two times or three times), thanks to the cost-effectiveness of our ultra-small microLED chips that results in a dramatic reduction in the required chip transfer yield.

Aledia’s volume production fab.

To appreciate the benefits of this redundancy, let’s consider a 4K display with 8.3 million pixels and 25 million sub-pixels. To meet the requirement for zero dead pixels, when using a three-times redundancy, our display manufacturing yield can hit 99 percent when there is only a 99.95 percent yield for chip transfer. With this approach we can avoid repair after transfer. While at first glance, a three times redundancy would suggest high expenditure, thanks to the extremely small size of the microLEDs, additional spend on them is lower than any repair cost.

There is much to like with our technology, including the use large silicon substrates, very high efficiencies for incredibly small microLEDs, and the capability of products that enable more efficient driving of the display. To bring the nanowire technology to high volume manufacturing, we have built a volume production fab on the outskirts of Grenoble, France. This year we started to install equipment in this fab, which will support a ramp in production in 2024.


Further reading
T. Lassiaz et al. “Nanoscale Dopant Profiling of Individual Semiconductor Wires by Capacitance–Voltage Measurement.” Nano Letters 21 3372 (2021)