Targeting Millimetre-wave Communications With InGaAs HEMTs And Silicon CMOS
Wafer level integration of InGaAs HEMTs and silicon CMOS can create millimetre-wave circuits with a small footprint, low cost and high performance by Sachin Yadav, Sang Xuan Nguyen, Fayyaz Singaporewala, Kenneth Lee, Eugene Fitzgerald and Xiao Gong from the Singapore-MIT Alliance for research and technology "“ low energy electronic systems
- Since the introduction of the integrated circuit in 1959, silicon has dominated the semiconductor industry. In the form of silicon CMOS, it has advanced at a rapid pace to offer an unparalleled device integration density.
However, silicon cannot do everything. In the highfrequency domain, devices made from this material are inferior to those formed from the likes of GaAs, GaN and InP "“ all those alternatives offer higher powers, lower noise and superior linearity. Due to this, the trend in modern communication devices is to bring together high-speed III-V devices and high-density silicon-CMOS on the same circuit board.
Until recently, this integration has taken place at either the board or the packaging level. That's not ideal, though, as it leads to a large circuit footprint, large interconnect losses, and high cost.
A far better option is wafer-level integration of different material systems. This approach opens up a plethora of new opportunities for future communication devices. As can be the case for a silicon-only RF technology, monolithic heterogeneous integration promises lower costs, reduced interconnect power consumption, superior circuit performance, a smaller chip footprint, fewer packages at the board level, and more room for circuit innovation for millimetre-wave communication applications, such as 5G mobile and wireless.
The superior performance that comes from monolithic integration partially results from the opportunity to position silicon and III-V devices very close together "“ they can be separated by a few microns, and sometimes even less. Systems that can be realized in this manner include a transceiver based on the hybrid monolithic integration of silicon and III-Vs (see Figure 1). This system can combine an RF front-end formed with high-performance III-Vs, or a combination of III-V and silicon-CMOS devices; with a digital baseband in highly integrated silicon-CMOS technology. It's a marriage that brings out the best in both III-V and silicon.
Figure 1. Hybrid transceiver systems can exploit the advantages of III-V and silicon-CMOS technologies. Using this approach, high-performance amplifiers, filters, and converters can be designed using III-V technologies, while the control and digital circuitry can be designed using silicon-CMOS. In addition, hybrid sub-circuits, such as ADC (analogue-to-digital converters) and DAC (digital-to-analogue converters), can be implemented using a combination of III-V and silicon-CMOS devices.
Several III-V technologies can be used to produce power and low-noise solid-state amplifier technologies at millimetre-wave frequencies "“ that is, those that span 30 GHz to 300 GHz. Out of these options, InGaAs HEMTs and HBTs offer the most balanced noise and power performance for 5G applications (see Figure 2(a) for on-chip output powers of various microwave, millimetre-wave, and sub-millimetre-wave power amplifiers).
Figure 2. (a) Plotting the output power as a function of frequency for various on-chip III-V power amplifiers reveals that for operating frequencies less than 100 GHz, GaN-based power amplifiers provide a superior performance compared with that of other solid-state technologies. For frequencies above 100 GHz, InGaAs HEMTs and InP HBTs lead to the best power performance. (b) Comparing noise figures at various frequencies for various low-noise amplifiers shows that those based on InGaAs HEMTs provide the best noise performance.
The preference for InGaAs might raise a few eyebrows, given the success of GaN in the RF domain. However, while GaN-based MMICs exhibit the best power output among the solid-state device technologies, the GaN PA is compromised by a high operating voltage, due to the large knee-voltage of the GaN HEMT.
If a hybrid III-V and silicon technology is to create a device with tremendous sales, it will have to target a high-volume product that already uses silicon. In the wireless space, such volumes are already achieved in mobile devices, such as handsets. Handsets, however, operate at voltage ranges where GaN loses its primary advantage.
For frequencies exceeding 100 GHz, the best PA performances come from InGaAs HEMTs and InP HBTs. Of these two, InGaAs HEMTs have lower noise figures, making them the premier choice for low-noise amplifiers operating in this frequency domain. The upper hand stems from the record high transconductance, electron mobility, and cut-off frequencies of InGaAs HEMTs "“ and bandgap engineering enables these devices to span a frequency range that extends all the way from a few gigahertz up to 1 THz. So these devices are versatile, while their combination of medium output powers and low noise figures make the InGaAs HEMT-based amplifier the most suitable candidate for applications such as 5G mobile.
Integrating InGaAs and silicon
At the Singapore-MIT Alliance for Research and Technology Low Energy Electronic Systems (SMART-LEES) we are integrating InGaAs MOS-HEMTs with silicon CMOS, using 200 mm silicon wafers (see Figure 3).
One of the merits of this approach is that by using large-diameter wafers, we can address the ever increasing demand for such technologies. Additional attributes are that the integration can employ existing, mature silicon multi-layer interconnects; and hybrid circuits can be formed, by combining p-type silicon transistors with n-type InGaAs transistors. The separation between these two different types of devices may be as small as just a few microns.
The MOS HEMT is a lesser known device than the commercially available Schottky-gate HEMT. But in our circuits, we believe it's a better choice. In recent years, InGaAs MOS devices and ohmic contacts have received significant attention in the research community, due to successes that include a record transconductance for InGaAs quantum-well MOSFETs among all III-V FETs. Another feature of the MOS HEMT is that it can contain a high-Îº gate oxide, which can slash the gate leakage current compared with that of the Schottky gate HEMT. This is most welcome, because it opens the door to more aggressive device scaling and higher device density.
We process our silicon CMOS and InGaAs front-end devices sequentially in a CMOS-flow (see "Uniting CMOS and InGaAs front-end devices"). Our process includes a wafer bonding step (see Figure 4).