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IRPS Increases Its Coverage Of SiC And GaN

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Reliability conference covers degradation in commercial 1200 V MOSFETs, a method for surge rating GaN FETs, and an approach to predicting the lifetime of GaN HEMTs

BY ROBERT KAPLAR FROM SANDIA NATIONAL LABORATORIES, MATTEO MENEGHINI FROM THE UNIVERSITY OF PADOVA AND AIVARS LELIS FROM THE US ARMY RESEARCH LABORATORY


Over the past few years, interest has rocketed in the use of wide bandgap devices for energy-efficiency applications such as the electric grid, vehicle electrification, and more-electric aircraft. Deployed in these situations, devices must have a high reliability. In fact, this attribute is so crucial that it is a primary gating factor, determining the rate at which these wide bandgap devices are being inserted into these system applications.

Helping to keep track of progress to date, and identify the key challenges for tomorrow, is the International Reliability Physics Symposium (IRPS). Held this year at the Hyatt Regency in Monterey, CA, between March 31 and April 4, the latest conference in this series featured a full programme on the reliability of SiC and GaN, the two most established wide-bandgap semiconductors. This year's attendees were able to learn a great deal about the reliability of devices made from both of these materials, as coverage of these devices provided one of the three focus topics. Insights were provided in tutorials, four technical sessions - including a focus session packed with invited talks, delivered by some of the most prominent researchers in the field - a poster session, and several workshop sessions. In addition, IRPS hosted a meeting of the newly-established JEDEC JC-70 group, which is continuing to work on establishing reliability standards for SiC and GaN.

Helping delegates that are not that familiar with wide bandgap materials to increase their knowledge of them were the tutorials given on SiC and GaN at the start of the conference. Tsunenobu Kimoto from Kyoto University, Japan, discussed the former in a comprehensive presentation covering several key areas of SiC reliability. After providing an overview of SiC power devices and their applications, he discussed SiC material defects, degradation mechanisms that are specific to bipolar devices, and the reliability of the SiC metal-oxide-semiconductor system, which tends to employ thermally-grown SiO2 as the oxide.

To help delegates wanting to get up to speed on GaN, Enrico Zanoni from the University of Padova, Italy, provided a tutorial focusing on failure modes and mechanisms in GaN. He spoke about microwave and power-switching HEMTs, covering topics that included: the nature and characterization of deep-level defects, both within nitride materials and at their surfaces; hot-electron effects; and breakdown in HEMT gate stacks.

Greater focus on SiC

Recently, there has been an increase in the number of papers at IRPS covering the reliability of wide bandgap devices. There are more presentations on GaN than SiC, but due to a rise of the latter, this year broke new ground with the first full technical session on SiC reliability at IRPS, held on Tuesday. It featured an invited talk by Nando Kaminski providing an overview of the status of SiC reliability. The US Army Research Laboratory provided an updated assessment of bias-temperature instability of 1200 V SiC MOSFET threshold-voltage shifts, showing a wide variation in sensitivity to bias-temperature stress between vendors, and the importance of making fast, immediate measurements following such stress. Recent results from industry were presented as well, with GeneSiC reporting on the robustness of their 4600 V MOSFETs, and Kevin Matocha from Littelfuse giving an invited talk during the wide bandgap focus session on how to design for reliability in SiC MOSFETs. It is hoped that this is the start of a new era at IRPS, with continued robust participation by the SiC reliability community.

Also during the WBG focus session on Wednesday morning, Anant Agarwal from Ohio State University discussed different design strategies for making rugged SiC power devices. His team has assessed the performance of commercial 1200V MOSFETs produced by various vendors. This investigation revealed that the transistors exhibit a significant variance in short-circuit time, threshold-voltage shift, and gate leakage. To uncover the reasons for this, Agarwal and his co-workers subjected the devices to a series of experiments. These efforts revealed that all of the commercial SiC devices were degraded when subjected to a 10 µs short-circuit time at just two-thirds of the rated drain-source voltage. They attribute this weakness to the small device size, which cuts costs, but is impaired by a reduction in channel length.

Agarwal proposed a pathway to increase the short-circuit time: a reduction in gate voltage, possibly through the use of a source resistance. However, this may have an unwanted side-effect, as it could impact the on-resistance of the transistor.

The team from Ohio also observed a large variance in threshold voltage. They point the main finger at interface and border traps - as does the US Army Research Laboratory, which refers to border traps as near-interfacial oxide traps. This might be addressed with a suitable oxidation process that could reduce the densities of these border traps, along with a reduction in interface traps.

Assessing GaN FETs

The wide bandgap focus session also included several talks on GaN device reliability, including an invited talk, a late-news paper, and a presentation by Alaleh Tajalli from the University of Padova. Tajilli, working with ON Semiconductor, netted the accolade of the best paper presentation at ESREF - the European counterpart to IRPS - for her paper Impact of Sidewall Etching on the Dynamic Performance of GaN-on-Si E-Mode Transistors.

The invited GaN paper in this session came from Peter Moens, who works for the multi-national power electronics giant ON Semiconductor. His invited talk described a novel physical-statistical approach to AlGaN/GaN HEMT reliability, involving the application of a forward gate stress. He and his co-workers fitted the gate-leakage curves of transistors to a physical conduction model. Plots were made as a function of temperature and field.

Using this approach, the team at ON Semiconductor has shown that the Poole-Frenkel model provides a good fit to the data. In addition, they have demonstrated that time-to-failure data shows an exponential dependence on the reciprocal of the gate leakage current.

Another key finding presented in this paper is the demonstration that all time-to-failure data can be used to extrapolate lifetime in a self-consistent manner. To do this, Moens and co-workers re-scale the time-to-failure datasets for different stress conditions to one single voltage and temperature - they select a gate voltage of 7.25 V and a temperature of 150°C. Area scaling is confirmed by comparing data from large and small transistors.

Delegates to IRPS were also able to attend two full sessions focused entirely on the reliability of GaN devices. The first, on Wednesday morning, featured a presentation by Sandeep Bahl from Texas Instruments detailing a method to validate GaN FET reliability under power line surges. Progress on this front is much needed, because GaN FETs do not tend to show avalanche capability. This has resulted in many questions from users of the devices about whether GaN FETs will be robust against power line surges. However, because of their superior transient overvoltage capability compared with silicon, GaN FETs may still be used in the design of surge-robust power supplies.

Bahl argued that the methodology used to evaluate silicon FETs is unsuitable for GaN, due to the low avalanche energy capability of today's GaN FETs. However, GaN FETs have a higher overvoltage capability than their silicon counterparts, so these devices can operate through surges without avalanching. Based on these considerations, Bahl and co-workers have defined a methodology for the surge rating of GaN transistors, including a test-circuit, validation conditions, the specification of a device-level surge parameter, and a simulation approach, ultimately leading to a device-level surge parametric specification.

The researchers have found that GaN FETs are robust to power line surges for a bus-voltage of 720 V. This is the first time GaN FETs have been shown to be robust to power line surges and this demonstration is a step forward for the GaN industry.

On Thursday, delegates at IPRS could attend the fourth session on wide bandgap reliability (and the second focused entirely on GaN). This session featured several talks from researchers at the University of Padova.

Delivering the first of these, Abygael Viey presented results on the influence of gate length on positive-bias-temperature-instability in enhancement-mode MOS-HEMTs. During his talk, he explained why a short-channel effect might be responsible for degradation in these devices.

Following Viey came Maria Ruzzarin, who described efforts to assess the robustness of the gate oxide in a vertical GaN trench MOSFET. The design of this device structure is closer to that of a high-voltage SiC MOSFET than a GaN HEMT. Consequently, studies of this device have opened up a new research field where very few reliability results exist.

Next up, Elena Fabris detailed hot-electron effects in GaN gate-injection transistors (GITs) and variants known as HD-GITs - the latter has an additional p-region physically located near the drain and electrically tied to it. She explained that in these devices, hole injection from the drain p-region is believed to substantially reduce the parametric shifts due to hot-electron effects.

Eleonora Canato delivered the final presentation in the session. She has been examining microsecond-scale shifts in the threshold voltage of p-gate HEMTs. This led to the discovery of two distinct trapping processes, dependent upon the magnitude of the gate-voltage stress.

The programme at this year's IRPS highlighted the tremendous effort being devoted to the reliability of wide bandgap devices all over the world. This is set to continue, with more insights sure to be discovered in the next few years. Some of these findings will be reported at the next IRPS meeting, to be held in Dallas, TX, between March 29 and April 2, 2020.

The 2019 IEEE International Reliability Physics Symposium was held at Hyatt Regency Monterey Hotel and Spa between 31 March and 4 April. The programme chair for this meeting was Robert Kaplar from Sandia National Laboratories

Demonstrating the great interest of the IRPS community in wide bandgap devices, this topic featured in the latest best paper and the best student paper. Announced at the 2019 meeting, the winning papers from the 2018 meeting were: A Novel Insight of pBTI Degradation in GaN-on-Si E-mode MOSc-HEMT by William Vandendaele (CEA-Leti). This award-winning paper presented, for the first time, a comparison between AC and DC stress combined with ultra-fast positive bias temperature instability measurements (<10 µs) on GaN-on-silicon E-mode MOSc-HEMTs.Degradation of Vertical GaN FETs Under Gate and Drain Stress by Maria Ruzzarin


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