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MoS2 used to make smallest transistor

Berkeley Lab-led research breaks size barrier by creating 1nm gate

A research team led by faculty scientist Ali Javey at the US Department of Energy's Lawrence Berkeley National Laboratory has created what is believed to be the smallest transistor. Made from carbon nanutubes and the 2D compound semiconductor MoS2, the device has a working gate measuring 1nm.

Currently, 5nm is considered the smallest possible transistor gate size among conventional semiconductors, about one-quarter the size of high-end 20nm gate transistors now on the market.

"The semiconductor industry has long assumed that any gate below 5nm wouldn't work, so anything below that was not even considered," said study lead author Sujay Desai, a graduate student in Javey's lab. "This research shows that sub-5nm gates should not be discounted. Industry has been squeezing every last bit of capability out of silicon. By changing the material from silicon to MoS2, we can make a transistor with a gate that is just 1nm in length, and operate it like a switch."

The findings were published in the journal Science. Other investigators on this paper include Jeff Bokor, a faculty senior scientist at Berkeley Lab and a professor at UC Berkeley; Chenming Hu, a professor at UC Berkeley; Moon Kim, a professor at the University of Texas at Dallas; and H.S. Philip Wong, a professor at Stanford University.

The researchers think the development could be key to keeping alive Intel co-founder Gordon Moore's prediction that the density of transistors on integrated circuits would double every two years.

The transistor is at this stage a proof of concept, says Javey. "We have not yet packed these transistors onto a chip, and we haven't done this billions of times over. We also have not developed self-aligned fabrication schemes for reducing parasitic resistances in the device. But this work is important to show that we are no longer limited to a 5nm gate for our transistors. Moore's Law can continue a while longer by proper engineering of the semiconductor material and device architecture."

The work at Berkeley Lab was primarily funded by the US Department of Energy's Basic Energy Sciences program. Some of this research was conducted at the Molecular Foundry, a DOE Office of Science User Facility.

'MoS2 transistors with 1-nanometer gate lengths' by Sujay B. Desai et al;  Science  07 Oct 2016: Vol. 354, Issue 6308

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