Transferable thin‑film GaN LEDs
Electrochemical etching lifts membranes of III‑nitride LEDs, opening the door to scalable integration into CMOS-based photonics.
BY MIKOŁAJ CHLIPAŁA AND HENRYK TURSKI FROM THE INSTITUTE OF
HIGH PRESSURE PHYSICS OF THE POLISH ACADEMY OF SCIENCES
Generation of visible light has been transformed by GaN. From solid‑state lighting to backlighting displays, optical communication and sensing, GaN‑based devices are deeply embedded in today’s technology. Yet as optoelectronic systems become more complex, another key requirement is coming sharply into focus: the ability to integrate high‑quality light sources onto CMOS-compatible substrates.
This particular task is far from trivial. The trait that ensures the success of GaN devices – their excellent quality when grown on native bulk GaN substrates – has a downside, as it makes them stubbornly difficult to integrate with other technologies. And as well as being technically demanding, GaN substrates are expensive, reinforcing the need to use the material as efficiently as possible.
Moreover, bulk GaN is poorly suited for integration with with photonic integrated circuits, silicon electronics and flexible electronic platforms. All three of these technologies demand substrates that are inexpensive, available in large sizes and supported by mature fabrication ecosystems – criteria that bulk GaN fails to fulfil. And one potential solution, substrate re-use, is not easy. For GaN devices grown homoepitaxially on bulk substrates, it’s been a formidable challenge to detach the active device without damaging it.
Figure 1. A plasma‑assisted MBE system at Institute of High Pressure Polish Academy of Science used for GaN LED growth. Gallium and other group‑III elements are supplied from thermal evaporation sources, while active nitrogen is provided by a radio‑frequency plasma source, enabling low‑temperature growth of high‑quality III‑nitride epitaxial layers. Photo Dr. Grzegorz Muzioł.
The good news is that a promising solution is emerging, thanks to our efforts at the Institute of High Pressure Physics of the Polish Academy of Sciences. By combining epitaxial design with low‑voltage electrochemical etching, we cleanly release ultra‑thin GaN LED membranes, incorporating nanometre‑smooth back surfaces. From there we integrate these membranes on foreign substrates by micro‑transfer printing, while retaining electrical and optical performance. This approach provides a practical pathway to heterogeneous integration of high‑quality GaN light sources, accomplished without sacrificing the exceptional strengths of these emitters.
The value of native substrates
For the growth of GaN LEDs, a native substrate is superior to both sapphire and silicon, as it enables a significantly lower threading dislocation density. Thanks to this, devices have higher current handling, higher efficiency, enhanced reliability and a higher yield per wafer. These attributes are particularly important when LEDs are driven at high current densities, or deployed in demanding applications.
Due to the crystallographic compatibility of GaN-on-GaN LEDs, established escape routes for device release are unavailable. It’s not possible to employ laser lift off, which works well for GaN-on-sapphire, thanks to the absorption of laser energy at the interface; and wet etching, a common option for devices grown on silicon, is not viable.
Against this backdrop, electrochemical etching has much appeal. This technique enables selective removal of layers with specific doping concentrations, and leaves device layers intact. However, several obstacles are limiting the usefulness of this etching technique for micro-transfer printing applications.
Of these, the biggest obstacle is surface quality. For micro-transfer printing, interfaces must be extremely flat to ensure good mechanical contact and sufficient adhesion to the target wafer. Any residual roughness on the backside of a released device could compromise yield and reliability. To preserve device integrity, another matter to address is the suppression of parasitic etching paths, which can occur through dislocations, sidewalls or metal contacts.
