Fraunhofer IPMS to show APECS research at SEMICON Europa
At SEMICON Europa 2026 in Munich (November 10th to 13th), the Fraunhofer Institute for Photonic Microsystems IPMS will show current research results and developments for the semiconductor industry.
Amongst the institute’s exhibition highlights wil be a focus on European pilot line APECS (Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems), which provides an integration platform for 2.5D and 3D heterogeneous packaging of a wide range of promising core technologies such as CMOS, III-V, for RF, photonics and sensors.
“Future semiconductor systems will increasingly rely on the interaction of specialised components. The key challenge is to efficiently integrate chiplets, for example with memory or photonic functions, while validating the required processes under industry-relevant conditions. Back-end process technologies are also being introduced into the front-end fabrication of highly complex chips. Together, these advances can enable powerful yet energy-efficient systems,” says Wenke Weinreich, director of Fraunhofer IPMS.
The goal of APECS is to provide companies with industry-oriented access to advanced packaging and heterogeneous integration technologies. The focus is on integrating different semiconductor components, such as chiplets, memory devices, sensors, and photonic components, into high-performance systems. As a member of the FMD network, Fraunhofer IPMS contributes its expertise in wafer processing, integration technologies, and system development to the pilot line.
At SEMICON Europa, the institute will present current contributions to these technologies:
Interposers and 2.5D Integration
One approach to heterogeneous integration is 2.5D integration. In this concept, multiple chiplets are arranged side by side on a so-called interposer, which is mounted on a substrate similar to a conventional chip. The interposer serves as a high-density interconnection layer between individual components and enables short, high-performance electrical connections.
Fraunhofer IPMS develops the necessary process and integration technologies on 200 mm and 300 mm wafers. These activities provide a foundation for scalable chiplet systems and complex heterogeneous system architectures.
Quasi-Monolithic Integration of Chiplets at Wafer Level
With Quasi-Monolithic Integration (QMI), Fraunhofer IPMS is pursuing another approach for high-density chiplet integration. In this process, chiplets are embedded into specially structured recesses, known as pockets, within a silicon wafer. The surface is then planarised and prepared for subsequent wafer-level interconnection.
Within the APECS pilot line, Fraunhofer IPMS has demonstrated for the first time that chiplets can be integrated into a silicon wafer using this method. This achievement marks the first major milestone on the QMI roadmap.
Integrated Platform for the Photonic Systems of the Future
Whether for sensing, data processing, or quantum technologies, integrated photonics provides the foundation for compact and high-performance systems. Fraunhofer IPMS develops electro-optical devices and associated CMOS-compatible manufacturing technologies on 200 mm and 300 mm wafers.
A key technology platform is the institute’s silicon nitride (SiN) waveguide platform, available for both wafer sizes. It features extremely low optical losses across a broad wavelength range, from the visible spectrum to the mid-infrared region, enabling the realisation of complex photonic integrated circuits.
This platform serves as the basis for highly sensitive photonic biosensors as well as applications in photonic computing, quantum technologies, and hybrid integration with active components. Electronic and optical functionalities are integrated at wafer level, allowing the resulting devices to be manufactured cost-effectively in large volumes.
Fraunhofer IPMS at SEMICON Europa 2026
The presented work demonstrates the broad range of technology and manufacturing expertise available at Fraunhofer IPMS, spanning the development of new materials and devices, manufacturing processes on 200 mm and 300 mm wafers, and the integration of complex heterogeneous systems.
“For Europe to maintain a competitive microelectronics industry, new technologies must be successfully transferred from research into industrial application. Reliable process chains and opportunities for industry-oriented validation are essential for this,” concludes Weinreich.
