+44 (0)24 7671 8970
More publications     •     Advertise with us     •     Contact us
 
Technical Insight

New analytical techniques improve production control

Iain Calder describes how characterization equipment is being integrated into the process flow to provide increased measurement reliability, low cost and rapid turnaround.
Electronic and optoelectronic component manufacturing for the optical telecommunications industry has until recently consisted of low-volume engineering-intensive production lines. However, with the rapidly increasing demand for compound semiconductor components, manufacturing is changing to a high-volume, automated, silicon-like model. There is therefore a drive to reduce costs in all areas, including characterization and analysis.

On the other hand, compound semiconductor device processing is inherently more variable than silicon production, and a full toolkit of analytical techniques is required to maintain process control and performance. In many cases a particular technique is applied to every wafer, and in others a high sampling rate is needed. These requirements are expensive, and reconciling them has led to several new trends in material and device characterization.

Analytical requirements From the point at which new wafers are received the manufacturing process can be divided into six main stages: epitaxial growth, device processing, full wafer testing, packaging, final test (including reliability and life test) and shipment. A variety of characterization and analysis techniques are required; these include in situ measurements as an integral part of the growth and processing stages, as well as in-line characterization to provide monitoring as part of the process flow. More complex, expensive, or time-consuming characterization is handled off-line, but the results may be used to gate a later point in the process. Finally, there is the analytical work that is required for engineering, problem solving, root cause analysis and analysis of field returns.

These requirements have benefited from some significant trends in the characterization and analysis of compound semiconductor materials and devices. These include: i) high-throughput wafer mapping and imaging; ii) wider use of scanning probe techniques; iii) high-resolution site-specific analysis; iv) accurate, multivariate computer simulation; v) extensive cross-calibration and improved reliability of calibration; vi) increased use of in situ and in-line characterization. This article discusses examples of some of these approaches, drawn from MQW and buried heterostructure lasers, detectors, and GaAs or InP HBTs.

High-throughput mapping Full-wafer PL and reflectance mapping of every wafer after epitaxial growth has been an established practice for several years (Carver et al.). Recent developments in equipment using infrared array detection have enabled a combination of high-speed and high-resolution mapping, which is capable of improving the quality of the characterization while lowering the cost for large volumes (Wang et al.).

The example shown in figure 1 was obtained in around 3 minutes from a 3 inch wafer containing an MQW laser. Since the entire spectrum is obtained at each of the 20,000 positions, any extracted property - and in this case, peak wavelength - can be mapped through post-processing.

With the advent of high-power DCDM systems, it is now feasible to map a wafer by taking a full rocking curve at each position. As each map still takes several hours to complete, a single rocking curve is usually measured for routine characterization requirements. However, the full mapping capability is now available for analytical or diagnostic purposes, or on a sampled basis.

SIMS is another technique that can now make use of mapping, and it is already a standard tool for routine in-line growth characterization. New equipment provides automated multiwafer SIMS characterization with in situ real-time depth measurement. It is therefore feasible to collect many profiles over a wafer without operator intervention, and then to create a coarse map.

High-resolution imaging EDX mapping of material composition has been available for some years now. Figure 2 shows an HBT contact imaged with by SEM (2a) and an EDX map (2b). The outermost region visible in the SEM image is the Pd/Au metallization, while the dark ring is a silicon oxide side-wall. The center square is open to the GaAs semiconductor. It has also become practical in recent years to obtain a high-resolution AES image of a sample surface. Figure 2c shows an AES image of the same HBT structure as in figure 2a. While EDX probes up to a micron below the surface, AES is sensitive to the surface, and the two techniques provide complementary images. AES reveals the Pd metal on the surface, without detecting the Au.

×
Search the news archive

To close this popup you can press escape or click the close icon.
×
Logo
×
Register - Step 1

You may choose to subscribe to the Compound Semiconductor Magazine, the Compound Semiconductor Newsletter, or both. You may also request additional information if required, before submitting your application.


Please subscribe me to:

 

You chose the industry type of "Other"

Please enter the industry that you work in:
Please enter the industry that you work in: