Substrate makers tackle the growing challenges of InP
"The best ft and fmax for high-speed GaAs [chips] in production [today] are 110 GHz," she says. "There may be higher speed GaAs-integrated circuits in the literature, but we must move from development to production. We need better than 150 GHz for 40 Gbit/s systems, hence [we have a need for] InGaAs/InP and GaAsSb/InP HBTs."
However, speed is not the only factor that must be taken into account when producing high-performance integrated circuits, especially if you are a microelectronics chip maker. Chip processing is largely performed at the wafer level, so an easy way to keep costs down and realize economies of scale is to build more chips on a larger wafer. To meet this need, substrate makers are now focusing on the development of semi-insulating 4 inch InP, rather than the more established 2 and 3 inch single-crystal boules.
As with past advances in wafer manufacturing, the move towards 4 inch InP wafers has its problems. At last year s GaAs IC Symposium, Clark presented a paper entitled "Evaluation of 4 inch InP(Fe) substrates for the production of HBTs". According to Clark, Nortel Networks wanted to compare the crystal quality of semi-insulating substrates that had been grown by either the liquid encapsulated Czochralski (LEC) method or the vertical gradient freeze (VGF) technique.
Using a range of techniques including high-resolution scanning photoluminescence and asymmetric crystal topography, Clark characterized the wafers for surface defects. Typical defects included an uneven distribution of iron - the dopant added to InP to make it semi-insulating - as well as dislocations, slip, polycrystallinity, long-range strain and twinning. Overall wafer properties such as wafer flatness were also investigated.
Clark discovered that the characteristics of the wafers she studied varied depending on the method by which they were grown. For example, 4 inch wafers that were grown by LEC tended to suffer from high concentrations of defects, increasing from the seed or tail end of the boule. In contrast, defect densities were lower in the VGF-grown wafers.
These defects typically stem from an uneven iron-dopant distribution, a problem that plagues any wafer maker regardless of the growth technique, and leads to dislocations clustering around localized regions of reduced iron concentration. Clark believes that the higher thermal gradients which are used in LEC growth enhance this effect in these boules (see figures 1 and 2).
As well as controlling the dopant distribution, wafer makers also have to stop the iron segregating out of solution to form iron precipitates that can damage a wafer surface during polishing. Clark noticed this effect in both the LEC-grown and VGF-grown wafers.
From her studies, Clark says that of the other defects, wafers grown via LEC tend to suffer more from long-range strain and slip while wafers grown via VGF can exhibit severe twinning. Neither, however, encountered significant problems with polycrystallinity and all the manufacturers have recently improved wafer flatness.
To conclude her work Clark says that the crystal quality of 4 inch InP(Fe) wafers grown by VGF was comparable to smaller diameter InP(Fe) and 4 inch GaAs substrates also grown by VGF. On the other hand, for 4 inch InP(Fe) grown by LEC techniques, the defects were not as well controlled as smaller diameter InP(Fe) substrates or 4 inch GaAs substrates grown by the same technique.
Comparing growth techniques
Ask Clark whether she would rather use wafers grown by LEC or VGF and her answer is: "We haven t done enough work on InP to say that one growth technique is better than another, but the analytical data supports the conclusion that VGF is best. To date, Nortel Networks has only used VGF wafers for the growth of InP HBTs."
LEC is still a clear contender, however, and Clark says that although LEC boule manufacturers may have initially been slow to invest in 4 inch semi-insulating InP wafers, they have since developed boule and wafer annealing that gives a better dopant uniformity and fewer defects. One LEC boule manufacturer that would certainly agree with Clark on this point is the Japanese company Nikko Materials.
Nikko Materials is the InP and CdZnTe wafer-making arm of Japan Energy Corporation. Presently supplying 2 and 3 inch semi-insulating InP wafers at volume production levels, the company is already taking orders for 4 inch wafers at limited production volumes. Other companies that have been supplying small volumes of 4 inch semi-insulating LEC-grown wafers are Sumitomo Electric of Japan and US-based M/A-COM.
Kurt Williams, product manager of Nikko Materials USA attributes the company s 4 inch wafer progress to its ability to deliver high quality and reproducible wafers at the right time, rather than rushing lower quality wafers to market. "InP is a difficult material to work with, and producing the 4 inch wafers has been a challenge," he explained. "But we have taken the time to refine the quality of our 4 inch wafers and customer feedback shows that our timing has paid off." Indeed the company has just received qualification for its wafers from one of its customers, Velocium, a leading InP IC manufacturer.