Process porting provides a path to production scaling
For manufacturers still at the 4 inch wafer size, tough markets and excess industry capacity make the outsource option attractive. Given a producer s ability to provide device performance, delivery execution and certainty of supply can determine whose component gets into which platform. Raytheon RF Components (RRFC) of Andover, MA and WIN Semiconductors of Tao Yuan, Taiwan have taken a creative approach to address the cell-phone handset power amplifier market. The international team has moved an InGaP/GaAs HBT fab process and an RF product line simultaneously from a 4 inch diameter, dual-use defense and commercial fab to a high-volume, 6 inch commercial factory.
Moving product lines is a routine procedure in the silicon industry where circuit and process models are mature. It is more complicated in the compound semiconductor industry, where product performance is considered to be inextricably tied to the process line. Moving a fab process usually involves the transfer of an exact copy, including the tool set, at great expense. Even then products must routinely be redesigned, or at least re-tuned, to accommodate process-related changes in performance. Conversely, moving a product line to an existing process always involves redesign, extensive product redevelopment, and often multiple expensive iterations.
When the goal is to create chip-for-chip drop-in replacements, a better way is to "port" the process, i.e. move it cell by cell without changing the products made using it. By adopting the basic methods used in the silicon industry, and by paying attention to process details that affect performance, successful porting is faster, much less expensive and less disruptive to the flow of the product, and results in multiple qualified fab sites for a given product. An added benefit is that multiple geographically separated production facilities make the supply chain immune to disruption by natural disaster or power interruption. Porting eliminates the need for customers to re-qualify a product containing chips from a new source. The MMICs are demonstrably the same in terms of performance, behavior over temperature, and reliability at the unit cell and product levels.
Process capabilities align well at RRFC and WIN Semiconductors. RRFC is a leading supplier of GaAs-based MMICs, modules and wireless systems for land, mobile and space-based communication systems. A classic dual-use facility, RRFC leverages government-funded advanced R&D into technology and products that serve systems divisions within Raytheon Company, as well as a broad range of commercial customers. The company s 4 inch wafer process technologies cover 900 MHz to 100 GHz (see figure 1). Fab outsourcing to WIN provides access to a total additional capacity of 100,000 6 inch wafers per year, without adding risk or $100 million in investment to RRFC s cost structure. This enables RRFC to focus on its core strengths of advanced process and epitaxial material development and RF design. As new technologies mature along the price curve, RRFC will move them from its fast prototyping and moderate-volume local fab to WIN s high-volume outsource facility in Taiwan.
WIN Semiconductors has a new facility supporting many of the same technologies but at the much more economical 6 inch wafer diameter. WIN s tool set is closer to the state of the art, has a higher level of automation, and enjoys a level of service similar to that common in the silicon industry.
WIN derives multiple benefits from its association with RRFC. As a new company, WIN is seeking to develop its credibility as well as its technology to ensure success. Securing a customer of the size and reputation of Raytheon has enhanced WIN s credentials as a volume producer of GaAs MMICs, and will provide opportunities to participate in the development of new technologies as Raytheon s business expands into new applications. As the relationship develops, WIN and Raytheon have committed to work together to develop new markets, products and technologies. Over the life of the association WIN can expect a clearer view of future markets than it might otherwise have had, and for a significant portion of its business, it now has a predictable level of demand and revenue stream.
Considerations and objectives
The Raytheon/WIN team faced an aggressive schedule; move a line of eight basic InGaP HBT cell-phone PA chip designs supporting numerous power amplifier module (PAM) products from the US to Taiwan in under eight months. Both companies have their own proprietary HBT processes up and running. As a supplier of PAMs, Raytheon has a substantial investment in design intellectual property, and little interest in returning to the design-fab learning curve by moving into a new fab process. Ideally, Raytheon s products would be placed into WIN s fab line, resulting in minimum disruption, no need for Raytheon s designers to learn new models or processes, and little or no requirement for customers to re-qualify products. Most importantly though, the performance of the MMICs - and the modules they go into - must be identical in every meaningful way.
For RRFC s products, multiple frequencies, modulation schemes and biasing approaches need to be supported, each placing specific demands on the fab process and resulting parametric behavior. The duplication of DC parameters between the two process lines is critical in order to support biasing, quiescent currents in devices, and current under drive, without the need to adjust off-chip components within the module. Duplication of the application-specific RF behavior, such as power-added efficiency (PAE), gain, or adjacent channel power ratio (ACPR), is clearly a challenge in light of the conflicting requirements (e.g. raw output power and PAE for GSM applications, high efficiency and linearity at backed-off power operation for CDMA).
To support the overall schedule, the team adopted a structured multi-phase approach, focusing on parallel activity in the areas of epiwafer design, process architecture, process development and stabilization, and product qualification. Figure 2 shows the program, with clearly defined phases of engineering, development, and manufacturing and production qualification.