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Moore And More: The Increasing Importance Of Materials

Throughout the history of mankind, materials have been a defining factor in terms of tools and technologies. From the Stone Age, through the Bronze and Iron ages, materials have played a key role in human advancement. IQE’s Richard Hammond and Rob Harper take a look at the way modern day materials continue to define technological progress.

Had there been an electronics technology roadmap at the start of the 1940s, it may well have foreseen the coming of the “silicon age" with the evolution from the thermionic valve to the semiconductor transistor.

Such a roadmap may even have forecast the transition from Bardeen, Brattain and Shockley’s first germanium based transistor to the thousands of integrated silicon based transistors from which the earliest microprocessor chips were formed.


It was in 1965 that Gordon Moore of Intel observed that the complexity of integrated circuits increased exponentially over time, roughly “doubling" every two years.


 “Moore’s Law" has continued to hold true for the last four decades, during which time the Semiconductor Industry Association (SIA) has established a formal industry roadmap to predict and forecast technology trends aimed at ensuring continued development in the field of semiconductors.


This roadmap is known as the International Technology Roadmap for Semiconductors (ITRS).


For most of the interceding years since the ITRS was established, the focus of attention has been on device scaling, with ever decreasing feature dimensions being the key to achieving greater levels of integration and improved transistor performance.


In recent years, it has become apparent that physical limitations and spiraling fab costs means that continued reductions in feature size cannot continue indefinitely.


The ITRS fully recognizes the limitations of continued scalability and recent roadmap updates clearly indicate that the way forward for future technological evolution is expected to be based on the development of novel materials based technologies which are compatible with the pre-existing manufacturing infrastructure


The increasing demand for radio frequency (RF) wireless connectivity, high processing speeds and portability with its associated requirement for low power consumption, has already led to the widespread adoption of materials based solutions in the form of gallium arsenide (GaAs) devices.


Similarly, the adoption of materials manipulation techniques such as high-k dielectrics, strained silicon and silicon on insulator signal a trend towards the industry entering a new materials era.


In addition to high speed and low power consumption, next generation applications are likely to demand integration of photonic and CMOS functionality within a single chip, a challenge that can only be addressed from a materials perspective.


Although silicon has long been established as the de-facto standard semiconductor material, germanium, the material from which the first transistor was made, offers substantially higher electron and hole mobility and consequently can achieve far higher operating speeds, for a given device dimension.


Traditionally, silicon has become the material of choice because of its relative abundance and lower cost as well as its mechanical strength and its excellent native oxide SiO2 that forms an ideal insulating interface with silicon.


Germanium by contrast is a brittle material with poor native oxide properties and, being a less common commodity is comparatively expensive. However, the recent introduction of deposited high-k gate dielectrics to replace the traditional silicon dioxide, now affords the superior electronic properties of Germanium a new lease of life within mainstream CMOS manufacturing.


Beyond the 22nm device node, the ITRS roadmap has predicted the development of ‘new materials to replace silicon as a alternate device channel to increase the saturation velocity and maximize drain currents in MOSFETs, while minimizing leakage currents and power dissipation for technologies scaled to 16nm and beyond’


In order to address such stringent requirements, engineers at IQE’s manufacturing plant in Cardiff, UK have developed a new range of engineered substrates including germanium on insulator (GeOI).


Engineered GeOI substrates are produced using a unique layer transfer process from a ‘proprietary lattice matched substrate’ to produce a material with extremely low defectivity levels and excellent across wafer thickness uniformity. The GeOI subtrate is manufactured using conventional epitaxial growth techniques, which eliminates the use of bulk Ge wafers, and offers a cost effective solution to future CMOS requirements.


Removal of co-transferred material is achieved using highly selective etch methods resulting in smooth Ge layers with excellent across wafer thickness uniformity and extremely high crystal quality. Typical Ge layer thicknesses are of the order 10-100nm, with an across wafer thickness uniformity of ~3% and a surface roughness of 0.5nm. The thickness of both the final Ge device layer, and the buried oxide layer, can be tailored to suit the specific application.


The hybrid approach provides a virtual germanium substrate on top of a silicon substrate which means that the enhanced mobility performance that can be achieved in partially or fully depleted germanium devices can be produced using established, “CMOS safe" production processes and can employ the same range of dopants used in standard silicon processes.


The engineered substrates therefore allow device designers to look beyond the performance constraints imposed by existing silicon technologies to push the boundaries of future CMOS devices for generations to come


Additionally, the inherent photonic properties of GeOI also provides a potential platform for advanced, multi-junction photovoltaic devices for high efficiency solar cells.


AngelTech Live III: Join us on 12 April 2021!

AngelTech Live III will be broadcast on 12 April 2021, 10am BST, rebroadcast on 14 April (10am CTT) and 16 April (10am PST) and will feature online versions of the market-leading physical events: CS International and PIC International PLUS a brand new Silicon Semiconductor International Track!

Thanks to the great diversity of the semiconductor industry, we are always chasing new markets and developing a range of exciting technologies.

2021 is no different. Over the last few months interest in deep-UV LEDs has rocketed, due to its capability to disinfect and sanitise areas and combat Covid-19. We shall consider a roadmap for this device, along with technologies for boosting its output.

We shall also look at microLEDs, a display with many wonderful attributes, identifying processes for handling the mass transfer of tiny emitters that hold the key to commercialisation of this technology.

We shall also discuss electrification of transportation, underpinned by wide bandgap power electronics and supported by blue lasers that are ideal for processing copper.

Additional areas we will cover include the development of GaN ICs, to improve the reach of power electronics; the great strides that have been made with gallium oxide; and a look at new materials, such as cubic GaN and AlScN.

Having attracted 1500 delegates over the last 2 online summits, the 3rd event promises to be even bigger and better – with 3 interactive sessions over 1 day and will once again prove to be a key event across the semiconductor and photonic integrated circuits calendar.

So make sure you sign up today and discover the latest cutting edge developments across the compound semiconductor and integrated photonics value chain.



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