Unifying GaN RF and logic
A gold-free GaN-on-silicon platform that combines high-power RF devices with robust digital logic strengthens the foundations of tomorrow’s mixed-signal circuits.
BY BIN HOU, JIALE DU, HAO LU, LING YANG, XIAOHUA MA AND YUE HAO FROM XIDIAN UNIVERSITY
Today’s wireless infrastructure is asked to do much more than simply amplify and transmit signals. In the latest communication systems – particularly those serving 5G networks, satellite links and adaptive RF front-ends – the core semiconductor platform has to support high-frequency and high-power operation, while providing precise control and reliable digital decision-making. This set of requirements has spurred the development of very large-scale integrated circuits in RF front-end modules, and placed more stringent demands on mixed-signal integrated circuits, which combine RF analogue functions with digital logic on a single chip.
GaN is well suited to tackling this demanding task, thanks to the high density of its two-dimensional electron-gas (2DEG), its high critical electric field and its high saturation velocity. These strengths, which can be realised in large-scale, low-cost, CMOS-compatible wafers, give GaN-on-silicon devices great potential to provide high microwave power, alongside high logic performance. The combination of high-performance enhancement-mode (E-mode) and depletion-mode (D-mode) GaN equips the monolithic GaN-on-silicon platform with an attractive route to realising compact, versatile, robust mixed-signal systems.
Unfortunately, it is far from straightforward to fulfil this promise. One issue impeding success is that conventional GaN RF technologies tend to rely on gold-containing metallisation, which creates compatibility concerns for large-scale integration with silicon-based process flows. And another problem is that many GaN-on-silicon platforms struggle to deliver a high RF power density, stable enhancement-mode operation and strong digital logic performance. Both weaknesses must be tackled if GaN is to move beyond discrete RF power devices and become a broader platform for integrated mixed-signal electronics.
Taking on this challenge is our team from Xidian University. We are developing a GaN-based monolithic integrated platform on 6-inch high-resistivity silicon. Our approach employs a gold-free metal process, and integrates E-mode and D-mode GaN devices for both RF and logic applications.
Shared foundations
Underpinning our technology is a III-N epitaxial structure, formed on a 6-inch high-resistivity silicon substrate. Its growth begins with an AlN nucleation layer, followed by a step-graded AlGaN transition layer, a GaN buffer, an unintentionally doped GaN channel, an AlGaN barrier and a p-GaN cap. We include a step-graded transition layer, as this helps to address the lattice mismatch between GaN and silicon. Its inclusion supports the growth of a high-quality buffer and channel.
Our high-quality epitaxial platform enables the co-fabrication of RF and logic modules on a single wafer. In the RF section, we fabricate D-mode and E-mode devices with a gate length of 0.2 µm, a gate width of 100 µm, and a source-to-drain spacing of 4 µm. In the logic section, we deploy E/D-mode devices with longer gate dimensions – gate length is 1 µm – and widths tailored for logic operation. Here, the source-to-drain spacing is 6 µm. Resistors and capacitors are integrated in the logic part, enabling functional circuits rather than isolated transistors (see Figure 1).
Figure 1. A GaN-based monolithic integrated platform for RF and digital logic applications on 6-inch high-resistivity silicon substrates with a gold-free metal structure.
A key requirement for our platform is that it employs a gold-free process – this is crucial for compatibility with CMOS manufacturing flows. However, replacing conventional metallisation must not come at the expense of RF performance, so we have countered the threat of significant thermal and parasitic loss, introduced during a high-temperature alloy annealing process.
We avoid this pitfall by introducing a Ti/Al/Pt/Ti ohmic stack, together with an n+ InGaN regrowth after ohmic recess etching. With this approach, we ensure a direct contact to the two-dimensional electron gas, leading to an ultra-low ohmic contact resistance of 0.058 Ω mm. Note that there is also strong wafer-level uniformity across the 6-inch substrate.
A crucial benefit of the very low contact resistance is that it reduces access resistance, unlocking a high current drive for RF applications. This low resistance aids integrated circuits, contributing to lower loss and more stable operation. Just as importantly, an impressive performance is achieved without gold, allowing our platform to retain its compatibility advantage while supporting demanding RF operation.
E-mode RF GaN devices
The fabrication of E-mode GaN RF devices demands careful gate engineering. To shift the threshold voltage into the positive domain – the essence of E-mode operation – the AlGaN barrier beneath the gate must be recessed with extremely high precision, while producing a smooth surface. If the recess is too shallow, the device might fail to provide reliable E-mode operation; and if it is too deep or too damaging, carrier transport will be impaired, with RF performance suffering.
To walk this tightrope, we turn to atomic layer etching for the gate recess. This form of etching, involving sequential surface modification and
ion-assisted removal to provide precise control of the etching depth, limits plasma-induced damage (see Figure 2). For our E-mode RF devices, we use atomic layer etching to define a precisely controlled 4 nm-thick AlGaN barrier beneath the gate. Microscopy confirms the integrity of our recessed region and the smoothness of the remaining AlGaN surface.
Figure 2. Mechanism schematics of the atomic layer etching process for RF/logic applications. (a) BCl3/Cl2 chemical modifications upon the surface of an atomic (Al)GaN layer, (b) purge process for the removal of residual BCl3/Cl2 radical, (c) argon ion bombardment, (d) purge process for the removal of the atomic chlorinated layer.
Measurements on our 0.2 µm D-mode RF devices reveal a threshold voltage of -2.1 V, a drain current of 1237 mA mm-1, and a transconductance of 426 mS mm-1. For their E-mode cousins, there’s a positive threshold voltage of 0.76 V, a drain current of 648 mA mm-1 and an even higher transconductance – it’s 536 mS mm-1. Based on these numbers, we conclude that introducing the E-mode gate recess does not sacrifice the high carrier transport needed for RF operation.
Our devices also exhibit a decent high-voltage capability. D-mode and E-mode RF devices deliver breakdown voltages of 192 V and 205 V, respectively. These are very respectable values, considering a source-to-drain spacing of 4 µm. This breakdown performance is much valued, providing the headroom needed for high-voltage RF power operation.
Another encouraging set of results come from pulsed measurements, which determine current-collapse ratios of 8.9 percent and 9.5 percent for D-mode and E-mode devices, respectively. These values indicate that trapping-related degradation is well relieved (see Figure 3 and Figure 4).
Figure 3. DC characteristics of the D-mode GaN devices for RF applications with a gate length, Lg, of 0.2 µm, and a source-to-drain distance, Lsd, of 4 µm. (a) transfer curves, (b) output characteristics, (c) off-state breakdown properties and (d) double pulsed current-voltage (I-V) test.
Figure 4. DC characteristics of the E-mode GaN devices for RF applications with a gate length, Lg, of 0.2 µm, and a source-to-drain distance, Lsd, of 4 µm. (a) transfer curves, (b) output characteristics, (c) off-state breakdown properties and (d) double pulsed I-V test.
High-power RF characteristics
We have confirmed the RF potential of our platform with small-signal and large-signal measurements. Operating at a drain voltage of 20 V, our E-mode device has a cut off-frequency, fT, of 27.8 GHz, and a maximum oscillation frequency, fmax, of 80.8 GHz. For our D-mode device, fT is 29.2 GHz and fmax 69.8 GHz (see Figure 5).
Figure 5. Small signal performances of both E/D-mode RF devices with a gate length, Lg, of 0.2 µm and a source-to-drain distance, Lsd, of 4 µm. (b) Cut off-frequency, fT, and a maximum oscillation frequency, fmax, as a function of drain voltage for both E/D-mode RF devices.
Large-signal load-pull measurements at 3.6 GHz reveal the most significant advance. Operating with a drain voltage of 45 V, our D-mode device delivers a saturated output power density of 11.0 W mm-1 and an associated power-added efficiency (PAE) of 51.21 percent. Under the same operating voltage, our E-mode device produces a saturated output power density of 5.74 W mm-1 at a PAE of 44.92 percent (see Figure 6).
Figure 6. Load-pull characteristics of 0.2 µm RF devices at 3.6 GHz of (a) D-mode and (b) E-mode GaN HEMT at a drain voltage (Vdrain) of 45 V.
We conclude from these figures that our gold-free GaN-on-silicon devices support microwave-frequency operation while retaining the integration advantages of the silicon substrate.
One of the drawbacks of E-mode RF GaN devices is that they often face a difficult balance between delivering a high threshold voltage, a high current drive and a high RF power. Our results show that we ease this compromise through the combination of atomic layer etching, combined with high-quality epitaxy and the deployment of low-resistance gold-free ohmic contacts. Our E-mode device maintains a positive-threshold operation while delivering an RF power performance suitable for high-power applications.
Its counterpart, our D-mode device, delivers 11.0 W mm-1 at 3.6 GHz, highlighting its ability to play a key role in a shared platform supporting demanding RF amplification. We infer from the linear increase in output power with drain voltage of up to 45 V that there’s a stable safe-operating region, which is vital for practical RF power modules. Taken together, our D-mode and E-mode results show that our monolithic platform can accommodate both high-power RF amplification and normally-off device operation.
Logic-RF integration
For future mixed-signal GaN systems, a high RF output power alone is insufficient. Also needed is digital logic, used to provide control, protection, switching, signal conditioning and adaptive operation. For this reason, our platform incorporates p-GaN E/D-mode logic devices and circuits.
Our E-mode devices for logic applications have a threshold voltage of 1.15 V and an off-state current of just 2.7 × 10-7 mA mm-1. These attributes ensure robust operation of digital logic, which demands well-defined switching thresholds and a low static leakage. Through interconnection of D-mode and E-mode GaN HEMTs, we have realised integrated GaN inverters on the same monolithic platform (see Figure 7).
Figure 7. DC characteristics of (a) E-mode and (b)D-mode GaN devices for logic applications with gate length of 1 µm and a source-to-drain distance of 6 µm, respectively.
When operating under a supply voltage of 5 V, our inverters exhibit excellent voltage transfer behaviour. High and low noise margins are 2.43 V and 2.19 V, respectively, indicating that the operating window is balanced and robust. Output swing relative to supply voltage is close to the theoretical maximum, indicating strong signal integrity and efficient use of the available voltage range (see Figure 8).
Figure 8. (a) The voltage transfer curves and calculated noise margin of the GaN inverter working at a VDD of 5 V. The width of the gate, Wg, for E/D mode devices are 80 µm/8 µm. (b) The Vin–Vout transfer characteristics with different VDD values and (c) the voltage gain.
Building on this success, we have gone on to demonstrate more complex logic functionality. This has included the construction of inverter, NAND and NOR circuits, implemented on the monolithic platform and tested under continuous switching operation. These circuits, operating at driving frequencies from 100 kHz to 1 MHz, show that our platform supports a diverse and useful set of digital building blocks. Thanks to this logic capability, we are revolutionising the role of GaN-on-silicon technology, moving it from simply a power-transistor platform to one that’s an integrated RF and digital-control platform (see Figure 9).
Figure 9. Logic circuits and results in the monolithic integrated platform. (a), (c), (e) Schematics of circuit diagrams for inverter, NAND and NOR circuits. (b), (d), (f) Waveforms under continuous switching operation for inverter, NAND and NOR circuits with driving frequencies varied from 100 kHz to 1 MHz.
Mixed-signal promise
Combining RF and digital logic functions on the same GaN-on-silicon wafer opens a compelling path for future mixed-signal circuits. That’s valuable, as in practical systems, RF power devices rarely operate in isolation. Instead, they require biasing, switching, monitoring and protection circuitry. If these functions are implemented using separate chips or incompatible process technologies, system complexity increases and parasitics limit performance.
A monolithic GaN platform offers a more elegant approach. It allows RF amplification, logic control and passive elements to be integrated more closely, trimming interconnect length and enabling more compact circuit architectures. Our foundation, high-resistivity silicon, supports this move to more sophisticated RF operation; and the 6-inch wafer format provides a pathway to scalable manufacturing.
Our platform has a number of valued assets: an ultra-low ohmic contact resistance, a high RF current drive, a high breakdown voltage, a low current collapse, a high output power density and robust logic noise margins. Working in unison, these attributes directly address the long-standing gap between high-performance GaN RF devices and integrated GaN digital logic.
Crucially, our results also point towards more adaptive RF systems. In next-generation wireless and satellite communication hardware, power amplifiers may need to respond dynamically to changing signal environments, modulation formats and operating conditions. By integrating digital logic alongside RF power devices, our technology promises to support smarter bias control, protection functions and reconfigurable operation. These capabilities are only going to increase in importance, given two big trends within communication systems are higher powers and greater intelligence.
Our next step is to extend our platform, moving on from demonstrating devices and logic gates to the targeting of more complex mixed-signal circuits. Success hinges on further optimisation of layout, thermal management, circuit architecture and reliability under RF operating conditions. Fortunately, the essential building blocks for such endeavours are in place, as we are able to realise E-mode and D-mode RF devices, p-GaN logic transistors, inverters, NAND and NOR gates, resistors and capacitors on the same gold-free GaN-on-silicon platform.
By unifying high-power RF performance with digital logic capability, our gold-free monolithic GaN platform provides a promising foundation for next-generation mixed-signal electronics. It strengthens the case for GaN-on-silicon as a scalable, versatile, integration-friendly technology for future RF front-ends, communication systems and intelligent power-amplifier modules.
