Applied Materials Helps SiC Chipmakers move to 200mm
New 200mm CMP system precisely removes SiC material from wafers to help maximize chip performance, reliability and yield
Applied Materials, has announced new products that help enable SiC chipmakers transition from 150mm wafer production to 200mm production, which approximately doubles die output per wafer, to help satisfy the world’s growing demand for premium electric vehicle powertrains.
“To fuel the computer revolution, chipmakers moved to ever-larger wafer sizes, dramatically increasing chip output to satisfy burgeoning global demand,” said Sundar Ramamurthy, group VP and general manager of the ICAPS group at Applied Materials. “Today we are in the early stages of another revolution that will benefit from Applied’s expertise in materials engineering at an industrial scale.”
“Electrification of the transportation industry is a rising trend, and we are accelerating this inflection point by leading the global transition from silicon to SiC with our Wolfspeed technology,” said Gregg Lowe, president and CEO of Cree. “Delivering the highest-performing SiC power devices on larger 200mm wafers enables us to increase end-customer value and meet growing demand.”
“Applied’s support in helping speed qualification of 200mm processes in Albany and multi-equipment installations at our Mohawk Valley Fab is expediting this transition,” Lowe added. “Moreover, new technologies being developed by Applied’s ICAPS team, such as hot implant, have broadened and deepened our technical collaboration and helped accelerate our power technology roadmap.”
New 200mm SiC CMP System
SiC wafer surface quality is critically important to SiC device fabrication as any defects on the surface of the wafer will migrate through the subsequent layers. To produce uniform wafers with the highest quality surfaces, Applied has developed the Mirra® Durum™ CMP* system which integrates polishing, measurement of material removal, cleaning and drying in a single system. The new system has demonstrated a 50X reduction in finished wafer surface roughness as compared to mechanically grinded SiC wafers and a 3X reduction in roughness compared to batch CMP processing systems.
Hot Implant Increases SiC Chip Performance and Power Efficiency
During SiC chip fabrication, ion implantation places dopants within the material to help enable and direct the flow of current within the high power producing circuits. The density and hardness of SiC material makes it extremely challenging to inject, accurately place and activate the dopants while minimizing damage to the crystal lattice which reduces performance and power efficiency. Applied has solved this challenge with its new VIISta® 900 3D hot ion implant system for 150mm and 200mm SiC wafers. The hot implant technology injects ions with minimal damage to the lattice structure, resulting in a more than 40X reduction in resistivity compared to implant at room temperature.
Applied’s ICAPS (IoT, Communications, Automotive, Power and Sensors) business is developing additional products for the SiC power chip market including in PVD, CVD, etch and process control.