Bringing down the cost of III-V epitaxy

A radical form of HVPE that speeds growth, ensures high-quality interfaces, and allows the inclusion of aluminium-containing alloys will revolutionise production of III-V devices.

BY AARON PTAK, JOHN SIMON AND KEVIN SCHULTE FROM NREL

III-V semiconductors are the gold standard for many devices. They sit at the heart of lasers and LEDs, high-speed and high-power electronics, and space photovoltaics (PVs). Consider, for example, the latter: PVs made from III-Vs have demonstrated the highest energy-conversion efficiency and specific power for any material system, and can be very lightweight, thin and flexible, as well as incredibly stable – that’s everything anyone would want from a solar cell. What III-Vs are not, however, is cheap – at least on a cost-per-area basis – due to a lack of driving force to make them so.

For many devices, including transistors, cost-per-area is not a major issue. That’s because the high cost is amortized through the production of thousands and thousands of devices from every wafer. However, some applications don’t have this luxury, including PV – both solar and thermal – and microLEDs deployed to populate substantial display areas.

Again, using solar cells as an example, it costs between $30,000 and $50,000 to cover a square meter with high-efficiency III-V PV, while the equivalent cost for silicon solar cells is at least two orders of magnitude lower. Due to this significant disparity, the III-V team at the National Renewable Energy Laboratory devoted much effort in developing concentrating photovoltaics (CPV), motivated by the hope that the high cost of solar cells would be offset by relatively cheap aluminium, glass, and steel. Unfortunately, due largely to plummeting prices of silicon PV over the last decade, the CPV market never materialized.

Our new challenge is to make III-V devices competitive in one-Sun, non-concentrated applications where the benefits of thin, light, flexible, stable, high-efficiency III-V PV can truly shine. These attributes will allow III-Vs to be deployed in applications where today’s more prevalent solar technologies cannot, such as powering unmanned aerial vehicles, or being moulded into car bodies and integrated into architecture in ways that are more aesthetically pleasing. But there is a problem of scale. As each 6-inch III-V wafer produces just 4-5 W of power, the area required to produce megawatts, let alone the gigawatts needed to power an increasingly electrified world, is astonishing.

If these III-V devices are to move from niche markets, such as space PV, to widespread terrestrial applications without the aid of concentration, their cost will have to tumble. Success on this front would be welcome throughout the compound semiconductor community. Even for producers of devices where the size of the chip is a secondary matter, due to demand for III-Vs rising across the board, a substantial fall in cost would be good news.

Cost drivers
Three main factors contribute to the cost of producing III-V devices: the price of the substrate, the expense associated with the epitaxial process, and device processing. Substrate production costs have fallen in recent years, driven by increased demand for VCSELs and other optoelectronics, while post-processing has benefitted from higher levels of automation. The cost of epitaxy, however, has remained stubbornly high, which is why we have been focusing on an approach to slash the cost of epitaxial growth. Today’s MBE and MOCVD tools are batch systems, which limit throughput and hamper scaling to very large production volumes. Growth involves either relatively expensive precursors, used inefficiently, or costly high-vacuum equipment. What’s needed, especially for area-intensive device applications, is a low-cost, high-throughput and easily scalable deposition method that produces materials and devices with the same quality as the incumbent approaches.

We see HVPE as an exciting possible solution. Developed between the 1960s and the 1980s, this growth technique is well known for using high growth rates to produce high-quality III-Vs with excellent purity from inexpensive source materials (see Figure 1).

Figure 1. Conventional HVPE growth process.

In its heyday, engineers produced a number of devices by HVPE, including commodity GaAsP visible LEDs, grown on compositionally graded buffer layers on GaAs substrates. HVPE was well-suited to producing this type of device. High growth rates could accommodate relatively thick graded layers that minimize the dislocation density, but were to blame for an incapability to produce high-quality p-n junctions – this weakness stemmed from the challenges in realising abrupt changes in the growth chemistry within the HVPE reactor. To sidestep these challenges, p-n junctions were created by diffusion. This workaround offers an insight into why HVPE has not been applied to complex device structures.

Limitations of traditional HVPE
Refinements to MBE and MOCVD growth technologies throughout the 1980s enabled these techniques to outperform HVPE, which gradually fell out of favour. The two alternatives that now dominate III-V epi-growth have three major advantages over traditional HVPE: wide, easily controlled process windows; the ability to create structurally- and chemically- abrupt interfaces between device layers; and a wider palette of materials, including aluminium-containing alloys like AlGaAs and AlGaInP that were notoriously difficult to grow by HVPE.

Here we discuss the challenges of traditional HVPE in more detail, before outlining our solutions thatare making HVPE relevant in today’s epitaxy landscape.

With traditional HVPE, the growth rate is governed by the reduction of As-Ga-Cl species on the surface by active hydrogen. The energy barrier to crack molecular hydrogen limits growth rates at lower growth temperatures, while decomposition is an important factor at higher temperatures. These trends are behind an ‘inverted U-shaped’ growth rate dependence on temperature (see Figure 2). In comparison, growth rates for MBE and MOCVD are temperature insensitive over a large temperature range. In short, while HVPE boasts higher growth rates, it fails to provide a wide, temperature-independent process window that simplifies the growth of a targeted layer thickness or alloy composition.

Figure 2. Growth rate of GaAs grown by HVPE using different metal chloride partial pressures. The growth rate is limited by kinetics at low temperature and the effects of decomposition at higher temperature.

The HVPE process involves in situ generation of metal chlorides – realised through the reaction of metallic gallium and indium with anhydrous HCl – that provide group III precursor species. This reaction typically takes place in a hot quartz ampoule within the reactor. When growing a layered stack of different materials, there’s a need to stop the reaction, purge out the products and change to a new chemistry – but this takes up valuable time. Speeding this up is not easy, as there is significant chemical inertia in the process, and attempts to do so can lead to graded interfaces (see Figure 3). The high growth rates inherent in HVPE exacerbate the extent of the graded material. Due to this challenge, the traditional HVPE process is incapable of growing the abrupt heterointerfaces required for today’s modern, complex device structures.

Figure 3. Schematic representation of heterostructure growth using traditional- and Dynamic HVPE.

Two of the critical materials for realizing many high-efficiency device structures, from lasers and LEDs to transistors and solar cells, are AlGaAs and AlGaInP. Roles undertaken by these high-bandgap materials include providing the cladding layers for other materials, and acting as an active layer in devices operating in the visible domain. In HVPE, the analogous aluminium-containing precursor to the standard Ga and In precursors, GaCl and InCl, is AlCl. However, this molecule is extremely reactive. It etches quartz, the most common HVPE reactor material, and is likely to pyrolyze and deposit on reactor walls before it even reaches the substrate unless the reactor runs at 1000°C or more. These temperatures are incompatible with the incorporation of relatively volatile indium-containing molecules, and so preclude the formation of AlInP and its related alloys. Even when AlCl reaches the substrate, it has such a fast reaction with the group V source that it outcompetes all other precursors, leading to the formation of AlAs instead of controllable ternary and quaternary alloys.

HVPE reimagined – Dynamic HVPE
Driven by the need to drastically reduce the cost of IIIV PV for all applications, we have spent the last decade revisiting, refining, and reinvigorating HVPE to exploit its beneficial properties while minimizing the negatives. Our key innovation is to keep the process gases constant and move the wafer, rather than keeping the wafer stationary while changing the reactant gases, as is the case in traditional epitaxy (see Figure 3). This single change completely sidesteps traditional HVPE’s chemical inertia, which is behind the graded interfaces.

We have named our approach Dynamic HVPE, to differentiate this process from traditional HVPE. With the conventional form of HVPE, changing process gases to transfer from the deposition of one material to another leads to significant growth time under a mixed atmosphere containing both gases. That’s undesirable, tending to result in substantial growth of graded-composition material, due to growth rates that are often in excess of 1 mm/min.

To address this issue, Dynamic HVPE employs two adjacent growth chambers, each prepared with steady-state gas flows and growth conditions, and a wafer that moves between them in less than two seconds, leading to chemically- and structurally-abrupt heterointerfaces. According to energy dispersive X-ray spectroscopy measurements taken in a transmission electron microscope, undertaken on a GaAs/GaInP heterointerface, Dynamic HVPE ensures atomic-scale interface abruptness (see Figure 4).