Flip-chip bonding increases bandwidth of VCSEL arrays
Along with coplanar waveguide structures, flip-chip technology has been proposed as a solution for high-frequency demands. Increasing the bandwidth of multi-channel devices (e.g. 2D arrays) is not simply a matter of multiplying single channels; it is also necessary to find new solutions to integrate the VCSEL into the driver and to develop appropriate packaging. As well as facilitating high-frequency operation, flip-chip technology cuts down assembly time, increases yield and optimizes heat flow.
Towards two dimensions Two-dimensional VCSEL arrays are key components for achieving the highest aggregate bandwidths in tomorrow s parallel optical transceivers. Despite operating at 850 nm, arrays can be designed to emit through the bottom side of the device, making them suitable for flip-chip bonding. This allows the arrays to meet customers needs in terms of speed, power consumption, reliability and compact integration. Based on advanced technology, arrays target the requirements of transceivers in the OC-192 very-short-reach (VSR) and 10 Gigabit Ethernet arenas. This article will describe the static and dynamic device characteristics and reliability data for a 4 x 12 bottom-emitting 850 nm VCSEL array.
The first commercial VCSELs were proton-implanted single-channel devices, and were followed in 1998 by oxide-confined devices (figure 1). The first VCSEL arrays, with bandwidths of 4 and 12 Gbit/s, were manufactured by Motorola (Optobus) and Infineon (Paroli). Today several suppliers sell 1 x 12-channel VCSEL products offering 12-30 Gbit/s, including Agilent, Picolight, Emcore, Cielo, Avalon Photonics, Zarlink and ULM Photonics. All the VCSEL components mentioned so far have top-side emission and at least one top-side contact, which usually requires wire bonding. The optical sub-assembly developed by Mitel (now Zarlink) was the first without wire bonding. Next-generation transceivers will benefit from low power consumption, data throughput above 10 Gbit/s, simple beam-shaping optics and outstanding reliability (Mederer et al.,Jung et al.,Tatum et al.).
Flip-chip technology Extending VCSEL arrays into two dimensions requires a very different device design that permits flip-chip bonding and provides electrical and thermal contacts through the top surface (Michalzik et al.).Advanced bottom-emitting technology enables single-side contact pads for flip-chip integration, and also overcomes the fundamental absorption of the GaAs substrate at 850 nm. Looking at the maximum 3 dB bandwidth for a single channel, the highest value reported is 21.5 GHz (Lear et al.),but typically bandwidths are around 10 GHz. It is not obvious that the highest bit rates per single channel achieved up to now can be exceeded to a significant extent. Increasing the capacity of a point-to-point connection requires an increase in the number of channels. The best way to achieve this is by flip-chip bonding of a VCSEL array directly onto the driver chip, which provides excellent lateral and vertical integration.
The epitaxial structure used for fabricating bottom-emitting devices contains high-contrast top and bottom AlGaAs DBR mirrors, typically built of 32 and 24 layer pairs, respectively. The active region contains three GaAs QWs with A10.2Ga0.8As barriers. Mesas with a diameter of 10 µm are formed, then wet chemical etching is used to fabricate via holes. The formation of n- and p-contacts, polyimide passivation, electroplating of gold pillars and lateral structuring of metal pads completes the epi-side processing (see figure 2). To achieve flip-chip bonding, solder bumps are placed onto solder pads either on the VCSEL chip or on the driver chip. After soldering, the absorbing GaAs substrate is removed by selective wet chemical etching. In the standard VCSEL arrays manufactured by ULM Photonics the devices measure 225 x 225 µm2 on a pitch of 250 µm. Custom-designed arrangements that match driver circuits can easily be realized within a few general design rules.
Static electro-optical characteristics Typical characteristics of a flip-chip bonded 4 x 12 array after substrate removal are plotted in figure 3. A silicon subcarrier with metal lines and PbSn solder bumps is used as a substitute for a CMOS driver chip. Typical threshold currents and voltages are 1.1 mA and 1.7 V, respectively, and the series resistance is 70 omega at an appropriate operational current of 4 mA.
The differential quantum efficiency of 0.3 W/A results in typical wallplug efficiencies in excess of 10% at 1 mW output power. The variation of output power at 4 mA within the 4 x 12 VCSEL array is less than 10%, accompanied by a voltage variation of less than 3%. The emission wavelength is centered at 850 nm and shifts by around 0.2 nm/mW with increasing dissipated power. The thermal resistance of a 10 µm diameter VCSEL flip-chip soldered onto silicon is calculated to be 2.8 K/mW. Due to emission in multiple modes, the spectral width is about 2 nm within a 10 dB drop, with respect to maximum spectral power. The broad spectral width is a result of the optimization for low mode partition noise, which is necessary for high-speed modulation.
