OpNext partners with Vitesse and WIN for 43 Gbit/s ICs
The ICs were designed by OpNext s Advanced Products Development Center at Thousand Oaks, California. The three receiver ICs were implemented with Vitesse Semiconductor Corporation s InP HBT process and the driver with WIN Semiconductors GaAs pHEMT process.
"OpNext is pioneering the development of high-end optical components, in particular 40G transceivers. These newly realized ICs exhibit high gain, wide bandwidth, short rise/fall times, low jitter, and well-opened eye diagrams, making them ideal for 40 Gbit/s transceivers," said K.C. Wang, VP of Advanced Products of OpNext. "We are pleased that we realized these working 43 Gbit/s analog ICs from the first design/fabrication iteration, with streamlined manufacturing processes and expedient 1-month fabrication time periods from Vitesse and WIN."
The modulator driver has differential outputs with above 2.5 V swing from each of the outputs, using a 0.4 V input. The additional jitter is less than 2 ps, peak-to-peak, and rise/fall times less than 10 ps. The integrated TIA/LA showed an overall transimpedance of 57 dBohm and a bandwidth of 35 GHz. The stand-alone limiting amp showed 26 dB gain and 37 GHz bandwidth. The AGC demonstrated controllable gain from -0.7 dB to 24 dB over a bandwidth of 34GHz. These ICs operated well at 43 Gbit/s, with open output eyes at both room temperature and 100 degrees C.
E-mail: info@opnext.com
Web site: http://www.opnext.com
