Perfect substrate within reach for wide-bandgap materials

Currently, sapphire and SiC are the most popular substrate choices, with work on the use of Si progressing well. However, while each of these materials has its advantages, it has taken much effort to grow GaN layers of the quality necessary for commercially viable devices. There have been some notable commercial successes, such as GaN-based blue LEDs grown on sapphire and SiC, but such successes have not stopped the search for bulk GaN substrates. These are now becoming available, albeit at rather small sizes, in low volumes and at high costs.

SiC substrates

After sapphire, SiC is the most commonly used and well developed substrate for GaN epitaxy and of course SiC homoepitaxy. It forms the basis for high-power, high-frequency electronic devices and high-brightness blue and green LEDs. Single-crystal bulk SiC is generally produced using physical vapor transport (PVT) techniques, where the starting materials sublime and crystallize on a seed. Each manufacturer using PVT has its own proprietary variation on the technique. However, there are exceptions, for example Okmetic in Finland uses a high-temperature CVD method to grow bulk SiC directly from gas-phase precursors.

The 6H and 4H polytypes of SiC are available in 50 and 75 mm diameter wafers in production volumes. The need to lower costs by increasing wafer diameters is as pressing for the wide-bandgap semiconductor industry as it is for the Si and III-V areas. The diameter of SiC wafers is increasing at a higher rate than that of Si and GaAs wafers (figure 1). In fact, SiC has moved from 25 to 100 mm wafers in half the time that it took Si or GaAs to make the same leap.

A roadmap for SiC wafer development was discussed at the 2001 ICSCRM meeting (see Compound Semiconductor January/February 2002, p59). Here, the development of 150 and even 200 mm wafers was discussed, with the expectation that they would be available in 10 years time. However, such a roadmap has a number of boundary conditions. First, does the capability to make larger wafers exist? Second, can the larger wafers actually be used? And finally, is there a market for them? Although MOCVD reactors can take large wafers for GaN deposition, manufacturers of tools for SiC epitaxy will need to develop reactors that can accommodate larger wafers and successfully grow on them. As Rob Glass, general manager and VP of Cree s SiC materials area points out, "Fewer people will buy larger wafers if they can t put a SiC epilayer on it. Three inch material is out there now being tested and prototyped with 100 mm a year, perhaps two, behind."

What the market needs it will get

Nippon Steel announced in 2001 that it had developed 100 mm SiC wafers and was expecting to have these in volume production by 2005 (see Compound Semiconductor November 2001, p11). It seems to be the case that companies involved in SiC wafer manufacture are being patient, and waiting for a true market to develop for larger diameter products rather than pushing a technology onto a market that is not ready.

However, supply helps to create demand. "If somebody comes out with a cost-effective, high-quality 100 mm substrate today, I think that would help push the market ahead. Nobody needs to wait until 2005," said Glass. "Cree demonstrated 100 mm wafers at the 1999 ICSCRM meeting, and market growth will help to justify volume production of these wafers. As always, those willing to do the early work with devices on large-area substrates will be in a better position when the market develops."

Micropipes: the killer defect

Possibly the most actively researched area of SiC development has been the reduction of micropipe defect density. Micropipes are voids that lie at the core of screw dislocations, reaching the surface and appearing as holes. Any device fabricated on an area in which a micropipe breaks the surface will be unlikely to work. It is this effect on yield that is driving the work to reduce micropipe density. The specifications in commercially available material are in the 10-100 micropipes per cm2 range, depending on wafer size, grade and how much the customer is willing to pay.

While efforts continue to eradicate micropipe formation during bulk growth, techniques have also been developed to fill the pipes. Subsequent SiC epilayers demonstrate greatly reduced or zero micropipe density, significantly enhancing device yields. However, such additional steps add costs to the production, and so the quest to eliminate micropipes during bulk growth will continue.

The user has to establish an acceptable balance between yield and cost per unit area of the wafer for their particular needs. If the yield reduction from the micropipes is minimal, then getting to the zero level may be unnecessary. However, in future some very-high-power devices will be of such a large area that a single device will occupy an entire wafer. Here, a single micropipe may prove fatal.

High-power, high-frequency devices

Essential to the operation of RF devices is the use of semi-insulating substrates. This adds another level of complexity to substrate manufacture as the material is usually made semi-insulating by doping with vanadium, which has limited solubility in SiC. Semi-insulating SiC is generally only available as 50 mm substrates. Although 75 and 100 mm semi-insulating material has been demonstrated, there is little market pull for this at present.

In the absence of III-N substrates, SiC is practically the only choice as a substrate for GaN-based power devices. It is no coincidence that the best-performing GaN power devices are those grown on SiC (see Compound Semiconductor November 2001, p69). SiC provides a smaller lattice mismatch with GaN than sapphire (3.3% for GaN versus 14.8% for sapphire) and has a higher thermal conductivity than sapphire and even GaN itself. However, this performance gain comes at a high price compared with sapphire substrates, and has led to some novel attempts to retain sapphire as the substrate, including thinning of the sapphire and bonding to a high thermal conductivity heat sink (see Compound Semiconductor December 2001, p43).