Chip manufacturers look to wafer-bonding technology
To realize full component integration, an understanding of materials compatibility is crucial. Si, with its low cost and good thermal, mechanical and electrical properties, still holds the lion s share of the semiconductor industry. Its oxide serves as an excellent dielectric layer in IC manufacturing, as well as an etch stop layer in micromachining applications for MEMS devices. However, Si s limited bandgap and its modest mobilities can limit device performance and restrict optical applications.
Scientists have therefore turned to GaAs and other compound semiconductors for use in various optoelectronic applications. More recently a paradigm shift has emerged; rather than choose between Si or compound semiconductors, why not combine the best of both worlds into integrated systems? This has now become possible through wafer-bonding technology. Beyond Si Wafer bonding, used to join two flat mirror-polished clean surfaces, is by no means restricted to Si wafers. Appropriate polishing methods and control of the surface chemistry enables a variety of solids with different structures (amorphous, polycrystalline, single crystals), crystallographic orientation and lattice constants to be bonded. Indeed, wafer bonding allows for materials combinations that were simply not possible when using epitaxial growth.
Many variations of wafer bonding are applied in microelectronics, MEMS, micro-optoelectromechanical systems (MOEMS) and advanced wafer-level packaging. Some of the most widely used wafer-bonding techniques include anodic bonding, direct (fusion) bonding, eutectic and thermocompression bonding, as well as temporary bonding for handling brittle compound semiconductor wafers. The choice of bonding method depends on the initial substrate and the final application. Anodic bonding Anodic bonding is a mature technology that was first introduced at the end of the 1960s. Used to join a Si wafer with a glass wafer that contains a high amount of alkali metal oxides, the technique s key applications include sensor encapsulation and wafer-level packaging (figure 1 shows a typical production system).
Anodic bonding takes place with heating and in an applied electric field. At a certain temperature, which depends on the composition of the glass, the oxides dissociate and the mobile metal ions are driven into the glass by the electric field. This process creates an oxygen-rich layer at the Si-glass interface. The oxygen ions are forced to the Si surface by the electric field and oxidize the Si. The resulting bond strength is very high and the process is irreversible.
Soda lime glasses were originally used in anodic bonding, but recent advances in the design of anodic glass substrates has led to significant improvements. Refining the glass chemistry has reduced contamination, while the thermal expansion coefficients of the glass now match those of semiconductor substrates. Fusion bonding Most materials, when properly polished, adhere to each other at room temperature and can be used for wafer bonding. Si-on-insulator (SOI) fabrication is one example of such bonding and was first reported in the middle of the 1980s.
SOI substrates consist of a thin Si "device layer" on an oxidized Si wafer. During SOI fabrication a thermally oxidized Si wafer, called the handle wafer, is bonded to a blank Si wafer, known as the donor wafer. The donor wafer is subsequently thinned or cleaved to achieve the required device layer thickness.
Two types of SOI material dominate. The first is thin SOI, which has a device layer thickness below 500 nm and is used for high-performance microelectronic applications. The second is thick SOI, which has a device layer thickness larger than 2 µm and is used in power devices as well as MEMS and MOEMS.
SOI makes a good starting material because of its lower operating voltages, which lead to lower power consumption and faster chip performance, and its radiation hardness. SOI is also useful in optical applications because of the large difference in refractive index between Si and its oxide. The material has great potential for the integration of optoelectronic and electronic components as it can be patterned and used to confine and transmit light.
Different material combinations obtained by fusion bonding include crystalline quartz on Si for high-frequency applications (Eda et al.), and GaAs or InP on Si for combining opto- and microelectronic devices (Kopperschmidt et al.). Also, different III-V materials can be combined to fabricate VCSELs (Ram et al.) and LEDs (Kish et al.). While a lot of fusion bonding can take place at room temperature, the bonding of III-V compound semiconductors requires elevated temperatures (300-600 °C), as well as flowing hydrogen or forming gas (Lo et al.). Eutectic bonding Eutectic bonding is frequently used for MEMS devices and advanced packaging, and meets the demand for hermetic as well as vacuum sealing for many microsystems. This technique is based on the use of bonding materials that form a eutectic alloy in specific temperature conditions. A typical temperature profile of the bonding is shown in figure 2.
Systems such as Au-Si, Au-Sn or Pd-Si are widely used. For Au-Si eutectic bonding, a gold layer of the desired thickness is first deposited on one of the two wafers. The Si is provided either from the bulk of one of the wafers or from deposited thin films.
At the Au-Si eutectic point of 363 °C, a liquid Au-Si alloy that contains 3% Si and 97% Au is formed. The actual bonding temperature is some 10 °C higher than the eutectic point, which allows sufficient solid-liquid interdiffusion at the interface. The eutectic alloy then solidifies on cooling.
