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IBM and RPI form broadband IC research center

IBM is to provide funding for an R&D center to develop technology for future information technology systems.
IBM is partnering with Rensselaer Polytechnic Institute (RPI) to form a $33 million R&D center to develop future broadband data transport technology. The Center for Broadband Data Transport Science and Technology will target optical and electrical data transport, switching, and processing designed to enable the scaling required by future information technology systems. As well as RPI, faculty members from SUNY Albany, CCNY and Cornell University will be involved.

The new center, based at RPI in Troy, New York, will undertake basic and applied research into improved broadband circuits and links, such as high-speed analog ICs for broadband transmission, coding, compression, and error correction algorithms. Digital circuits supporting broadband data transmission and links, and photonic device modeling, simulation and CAD tools are also seen as critical development areas. Also planned are studies of device-circuit interactions and related interconnect issues, device and system characterization, and testing.

Key research areas include layered optical waveguides and vias, chip-to-chip optical communications on multi-chip modules, and the development of sol-gel waveguide materials. Also on the agenda will be the wide bandgap devices for communications and interconnects, in addition to materials, processes and integration schemes for compound semiconductors on silicon. The center will also investigate automation technology that enables low-cost optical module packaging.

RPI has a micro-fabrication facility with 8500 sq. ft of class 100 clean room, and potentially has access to IBM s processing lines. These lines include Si BiCMOS technologies, and SiGe BiCMOS and 0.25-micron Si CMOS processes designed for RF applications. An upgrade of RPI s current facility is planned during the first phase of the venture, including the installation of approximately $3.7 million worth of 8-inch processing equipment. The center will employ baseline 8-inch CMOS capabilities this year. Expansion plans include an upgrade of the 8-inch facilities, and creating infrastructure for compound semiconductor and bio-chip processing.

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