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NTT reports fastest transistor-based logic ICs

Researchers at NTT have used InAlAs/InGaAs/InP HEMT-based ICs to demonstrate 100 Gbit/s multiplexing and demultiplexing functionality.
Researchers at NTT Photonics Laboratories have demonstrated what they believe to be the fastest logic operation of a transistor-based IC. The group reported error-free multiplexing and demultiplexing functionality at 100 Gbit/s, using InAlAs/InGaAs/InP HEMT technology. The results will be described in a late news paper at the IEEE International Electron Devices Meeting in San Francisco on December 9-11.

NTT fabricated two ICs using a 0.1-micron gate-length InAlAs/InGaAs/InP HEMT process, which provided a current gain cut-off frequency ft of 175 GHz and a maximum oscillation frequency fmax of 350 GHz.

A 100 Gbit/s selector IC contained two data buffers, a clock buffer and a 2:1 selector core circuit, which was designed to directly drive the external 50-ohm load without the need for output buffers. In order to confirm the error-free operation of the 100 Gbit/s selector IC, it was necessary to build a second IC capable of demultiplexing the 100 Gbit/s signal to 50 Gbit/s. This allowed the output waveform to be recorded using a 50 GHz bandwidth digitizing sampling oscilloscope.

Error-free operation with a bit error rate of less than 10-10 was confirmed for both the 100 Gbit/s multiplexing function of the selector IC and the 100 Gbit/s demultiplexing function of the second IC. Power dissipation was 3.2 W and 4.7 W, respectively.

The results will be presented at IEDM in paper #4.7, "100-Gbit/s Logic IC Using 0.1-µm-gate-length InAlAs/InGaAs/InP HEMTs," by K Murata et al. of NTT Corp.

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