Vitesse and MOSIS offer InP foundry services
The VIP-1 process offers circuit designers the benefits of both high-speed and high-voltage operation suitable for digital, analog, and RF circuits at 10 GHz or higher. The process uses four-inch diameter semi-insulating substrates and is designed for high performance and high yield. The key active device is an SHBT, characterized by ft = 150 GHz, fmax = 150 GHz (at Ic= 1 mA/micron), and BVCEO in excess of 4.5 V. The process also includes resistors and capacitors, and three layers of metal interconnect. Device models and design rules are supported in the Cadence design environment and the robust process supports junction temperatures of 125 ?C.
"Vitesse is building on its past success in the manufacturing of III-V integrated circuits to make a cost-effective InP IC technology available to a broad user base," said Ray Milano, VP of Physical Media Devices at Vitesse. "The access to volume manufacturing capability at a low cost and fast turnaround time is key to the wide spread adoption and usage of InP technology."
The silicon-like interconnect and volume manufacturing capability developed by Vitesse makes this process technology ideal for many applications requiring the performance or optoelectronic properties of InP such as high-voltage drivers, high-frequency amplifiers, high-speed DACs and ADCs, adaptive RF electronics, automotive radar, low loss waveguides and optical components such as photodetectors. Circuits, including Vitesse s 10 Gbit/s RZ modulator driver, 4:1 MUX and limiting amplifier, that were developed using this process have already been deployed into commercial telecommunications systems. To demonstrate the abilities of the process, Vitesse has produced the industry s most complex InP-based IC, a 40 Gbit/s 16:1 MUX with integrated PRBS 2(31)-1 generator, which contains close to 5000 HBTs. Vitesse will continue to advance the uses of InP technology through the development of its next generation process, VIP-2, a dual HBT InP process with ft = 300 GHz and BVCEO in excess of 10 V.
MOSIS will provide access to device models and design rules as well as reticle composition and overall schedule coordination. The circuit elements provided will include continuously scaleable parameterized cell transistors, resistors and capacitors, and ESD structures. Models are also available in ADS for microwave circuit design activity.
InP foundry services from Vitesse and MOSIS are available now, with quarterly fabrication runs initially planned.
