A novel approach to monolithically integrating electronic and optoelectronic functions is yielding higher-performance and lower-cost fiber-optic components, writes Simon Hicks.

InP is now established as the material of choice for a range of long-wavelength (1300-1600 nm) optoelectronic devices, and it has also been used to realize extremely high-frequency electronic circuits. However, the InP epitaxial layer structures and the fabrication processes employed for the two applications differ significantly, limiting the commercial success of attempts to utilize InP s inherent optoelectronic and high-frequency electronic properties in a single chip form. A new approach to InP integration overcomes many of these issues, and allows a significant degree of electronic and optoelectronic functionality to be integrated in a single chip form suitable for high-volume manufacturing. InP monolithic integration The crystal properties of InP and its associated alloys allow structures to be grown with optical band edges covering the range of wavelengths relevant to fiber-based telecommunication applications (1300-1600 nm). For this reason, InP has been used to realize a wide range of commercially available optoelectronic devices, such as lasers, modulators, detectors and semiconductor optical amplifiers. At the same time, InP has also been used to realize high-frequency electronic circuits. Typically, variations of HBT or HEMT structures are employed to achieve ft values well in excess of 200 GHz. Some companies have enjoyed commercial success in supplying InP-based electronic circuits, but only in applications where Si-, SiGe- or (to a lesser extent) GaAs-based devices cannot compete on performance. For example, the performance of current-generation 0.13 µm CMOS technology means that manufacturers can implement 10 Gbit/s serializer and deserializer circuits without the need for III-V technologies. There is now significant activity in the InP community to integrate InP-based optoelectronic and electronic functions on the same substrate. An example of this is the integration of an InP waveguide detector with an InP TIA. The main advantages of this approach are that it reduces chip count, with the potential of incrementally lower packaging costs and improved efficiency between the elements. Current monolithic limitations Critical disadvantages arise with standard monolithic approaches to integration because the epitaxial layer structure and, greater still, the die fabrication processes, differ between the electronic and the optoelectronic elements, making processing complicated. Typically, the epitaxial layers are grown for the optoelectronic functions, followed by die processing. Epitaxial regrowth is then employed to grow the layers for the electronic functions. A significantly different set of fabrication techniques is used to realize transistors, resistors, capacitors and other devices. Merging these manufacturing techniques into a unified process for monolithic device production inevitably compromises device performance. One must carefully weigh the gains in reduced real estate and packaging costs against the resultant decrease in the level of performance. Product cost is the chief casualty of the aforementioned technique. First, the merging of separate manufacturing processes often results in reduced yield of the monolithic part, compared with that of the discretes. At lower volumes, the unit cost of the monolithic product is not able to compete with that of the discrete approach, and often does not become competitive until higher-volume break points are achieved. The investment required to achieve this longer-term gain may outweigh the perceived benefits of integration. Second, packaging costs are negatively affected. A key driver for the integration of optoelectronic elements on the same chip is to avoid costly optical alignment processes during packaging. However, these alignment stages are not avoided by integrating electronic functionality, thus negating any significant cost reductions. In addition to product and packaging costs, reliability is affected. As discussed earlier, the process of monolithic integration results in a trade-off in device performance compared with the performance of the discrete devices. The cost of engineering a monolithically integrated part with comparable reliability to that of the established discrete parts may be prohibitive. It is necessary to give careful consideration to the factors affecting reliability as a result of monolithic integration, and the resultant changes to burn-in, environmental stress screening and other testing that may detrimentally affect unit costs. For these reasons, the commercial success of devices employing high-frequency electronic and optoelectronic functionality monolithically integrated onto a single InP chip has been severely limited. Moving beyond convention Essient Photonics has taken an innovative approach to InP integration that conquers many of the above issues, and enables a significant degree of electronic functionality to be integrated with optoelectronic functionality, all in a single chip form suitable for high-volume manufacturing. This is achieved by integrating InP-based resonant tunneling diode (RTD) technology with more traditional InP optoelectronic technology. For a number of years, RTDs have been investigated for use in the electronics sector, sometimes being employed as high-frequency oscillators and logic circuit elements. Many of their useful electronic properties arise from the fact that they exhibit at least one region of negative differential resistance (NDR), giving the potential for devices that provide electronic gain and high-frequency switching. Essient s RTDs consist of two 2 nm thick AlAs barriers surrounding a 6 nm thick InGaAs quantum well, embedded within a unipolar InGaAlAs waveguide (figure 1). MBE is used to grow the structures, giving the required layer thickness control and uniformity. The RTD introduces a non-uniform distribution of the electric field across the waveguide core. The electric field strength becomes strongly dependent upon the bias voltage due to accumulation and depletion of electrons in the emitter and collector sides of the RTD respectively. Depending on the DC bias point (approximately 1 V in figure 2), a small high-frequency AC signal (typically 100 mV) can induce high-speed switching of the electric field. This produces substantial high-speed modulation of the optical absorption coefficient within the waveguide at a given wavelength near the material band-edge via the Franz-Keldysh effect; therefore, it modulates light at photon energies lower than the waveguide core bandgap energy. In this mode, the device operates as an extremely low drive voltage (~100 mV) EAM, achieving DC optical extinction ratios of greater than 20 dB. This must be compared with the electrical drive voltage of >2 V required for a conventional InP-based EAM with comparable optical properties. Essentially, integrating electronic functionality into the EAM structure reduces the input power requirements of the optoelectronic interface from the power amplifier level, making it compatible with standard CMOS signals. There are several important advantages to this electronic-optoelectronic integration strategy. One benefit is that the die fabrication process does not require an epitaxial regrowth step, as the optoelectronic and electronic layer structures are spatially identical. The complete structure is therefore grown in a single run that can potentially simplify the process and enhance yield. Another benefit is that the die fabrication process does not require separate processing stages for the optoelectronic and electronic functions; both are realized through a single set of fabrication stages that in many ways are similar to those employed to realize traditional commercially available III-V modulator devices. All of the stages employ standard III-V optoelectronic device manufacturing techniques, including optical lithography, etching and metallization, which results in a small die size and a high-yield fabrication process. It is also possible to obtain the electronic functionality without the fabrication of complex HEMT or HBT-based circuitry. This significantly impacts die size and complexity and, in conjunction with the far simpler fabrication process, leads to a significant yield enhancement. Datacom and telecom applications Further significant advantages of this integration strategy are realized when it is applied to telecom and datacom transceiver modules. For the transmission of information at 10 Gbit/s, the transceiver design will depend on the required performance specification, yet some important general points can be made:
•Bringing the optoelectronic interface drive voltage requirements down from >2 V to ~100 mV eliminates the need for high-frequency, high-power driver amplifier circuitry. Essentially, the signal levels are compatible with the output signals coming directly from the CMOS aggregation electronics, typically in the form of serializer/deserializer chips.
•The driver circuitry is a significant source of heating within a module. The driver circuits typically employ bulky heat sinks to dissipate heat. Elimination of the driver circuitry reduces these thermal management issues.
•Furthermore, eliminating the driver circuitry results in a transceiver power requirement of less than one-third, and a board space of less than two-thirds, of that of a traditional transceiver. The above module power and size reductions aggressively address the demanding design constraints that today s module and system designers face, offering a higher degree of flexibility as opposed to modules incorporating conventional optoelectronic technologies. Because of its ability to provide ultra-low power with a reduced footprint while maintaining high levels of performance, this technological approach could have important applications to Ethernet solutions, such as XFP, XPAK and X2 as shown in figure 3. By combining electronic and optoelectronic functions on a single InP-based chip through the integration of RTDs with optoelectronic waveguide structures, the power level requirements of the optoelectronic interface in telecom and datacom applications can be addressed. In addition, it is possible to significantly enhance module performance and economics, making it an approach worthy of further consideration.