Technical Insight
The changing shape of the RF microelectronics landscape
New materials such as SiGe and strained Si are the key to extending silicon's reach and ensuring that the CMOS industry can prosper. But just as SiGe threatens GaAs, developments in CMOS are encroaching on SiGe's territory, writes Jon Newey.
Those who have been involved in GaAs electronics for many years may remember when the initial excitement at the performance of GaAs devices led some to rashly describe it as a "silicon killer". Although GaAs has become a mainstream manufacturable technology, the relatively high material and device-processing costs compared with Si have kept it firmly in high-performance niches. Indeed, the tables have turned somewhat and it has been said that the performance of new Si-based technologies will displace GaAs from many of its traditional niches, especially in the cost-conscious consumer applications such as cell phone and WLAN PAs. With this debate in mind, several talks at this year s Key Conference (held March 10-12 in Key West, FL) discussed the new developments that are reshaping Si-based microelectronics.
It is generally true that compound semiconductors have a performance edge over Si in terms of speed, noise and efficiency. Conversely, the Si industry benefits from far higher levels of integration and greater economies of scale. However, as the physical limits of the current materials in use are approached and power consumption becomes a critical problem, new materials are being looked at. Trevor Yancey of IC Insights described the Si industry as one with considerable momentum behind it, which is why the industry is extending the usefulness of Si by introducing new technologies such as SiGe, strained Si and SOI. New technologies not only extend Si s abilities, but also provide solutions to some pressing problems that threaten the economics of the industry as it strives to obey Moore s Law.
Moore s Law continues to be valid and has resulted in a 20,000x increase in the number of transistors per IC and a 35,000x increase in speed in the last 35 years. The two key drivers for this advance are decreasing linewidths (8 µm in 1970, 90 nm emerging now) and additional layers of interconnect (1 layer in 1970 and 6 in Intel s Pentium 4 processor). This progress has come at an economic cost to manufacturers. The cost of building a fab spirals upwards for each generation of CMOS technology, and by some estimates could reach $18 billion by 2010, compared with about $15 million in 1970. With ever-decreasing average selling prices squeezing margins, fab payback time is now approaching the standard product life cycle of 18-24 months, which is itself decreasing. An industry ceases to be profitable when the payback period for the capital equipment exceeds the time period over which the capital equipment is used. Without some sort of correction to these trends, the consumer can look forward to higher prices, while the CMOS industry will undergo consolidation and slower growth.
Brian Lord, AmberWave System s director of corporate development, thinks that the strained Si technology being developed and licensed by AmberWave will be an important part of the solution needed to prevent this gloomy scenario (Compound Semiconductor September 2002). The higher mobility of carriers in a thin strained Si layer means that faster and/or lower power consumption devices can be manufactured without the need to shrink linewidths. "New materials are the answer to this problem," said Lord. "What the industry really needs is a step-function improvement in the trend line to reduce the fab payback period to less than a year. We need to move to a system where instead of the fab driving the performance of next-generation products, the materials - specifically engineered substrates - become the driver." (figure 1).
New materials have been a feature of new generations of CMOS processes in the past, but their introduction has been made necessary by shrinking feature sizes and more levels of interconnect. However, strained Si is different because it enables improvements in device performance without a reduction in feature size or huge capital cost increase. "The magic is in the wafer," said Lord. "Manufacturers can simply buy the strained Si epiwafers and process them on normal CMOS lines."
The semiconductor industry continues to be dominated by Si. According to IC Insights, III-V materials accounted for just 1.2% of the market in 2002, and SiGe had a 0.2% market share. The situation in 2007 will look very similar, which is perhaps surprising given the fanfare surrounding the emergence of SiGe and its perceived benefits (table 1). In 2007, the SiGe market will be worth about $1.5 billion, or 0.8% of the IC market, with III-Vs having 1.6% of the market (figure 2).
SiGe offers many of the performance characteristics of compound semiconductors, but at about the cost of Si CMOS, because standard CMOS lines can be used for processing. It also allows a previously unseen level of integration, with SiGe bipolar transistors for analog and RF functions being combined with digital CMOS logic on the same chip. This has resulted in a large number of manufacturers that now have SiGe BiCMOS processes.
SiGe has certainly displaced GaAs in a number of applications, and in some camps it is thought that SiGe will also displace GaAs from its stronghold, the cell phone PA. However, SiGe also faces a challenge from the inexorable march of CMOS. In his presentation entitled "Semiconductor Technologies for a Changing Wireless World", Mark Wilson, director of technology strategy at Motorola SPS, stressed that it would be CMOS that shapes the future of the SiGe versus GaAs race.
Wilson described the semiconductor breakdown of Motorola s i.250 GSM/GPRS platform. Here, the power management functions and baseband processor are implemented in CMOS, the front-end transceiver in SiGe:C BiCMOS and the PA in GaAs (with Si for the control ICs). Given that the PA is the only area where GaAs has an impact in this volume market, and the rumblings that SiGe could even displace GaAs here, it may provide some comfort to those with a vested interest in GaAs to hear Wilson s comments on the prospects for PA technologies. "I certainly believe that GaAs HBT or E-mode PHEMT technology will [continue to] play a part in the PA socket at least in the final stage," he said. "There is a good chance that SiGe BiCMOS could find its way at least into the predriver stages and certainly a BiCMOS IC can be used for power control within the PA module."
It is generally true that compound semiconductors have a performance edge over Si in terms of speed, noise and efficiency. Conversely, the Si industry benefits from far higher levels of integration and greater economies of scale. However, as the physical limits of the current materials in use are approached and power consumption becomes a critical problem, new materials are being looked at. Trevor Yancey of IC Insights described the Si industry as one with considerable momentum behind it, which is why the industry is extending the usefulness of Si by introducing new technologies such as SiGe, strained Si and SOI. New technologies not only extend Si s abilities, but also provide solutions to some pressing problems that threaten the economics of the industry as it strives to obey Moore s Law.
Moore s Law continues to be valid and has resulted in a 20,000x increase in the number of transistors per IC and a 35,000x increase in speed in the last 35 years. The two key drivers for this advance are decreasing linewidths (8 µm in 1970, 90 nm emerging now) and additional layers of interconnect (1 layer in 1970 and 6 in Intel s Pentium 4 processor). This progress has come at an economic cost to manufacturers. The cost of building a fab spirals upwards for each generation of CMOS technology, and by some estimates could reach $18 billion by 2010, compared with about $15 million in 1970. With ever-decreasing average selling prices squeezing margins, fab payback time is now approaching the standard product life cycle of 18-24 months, which is itself decreasing. An industry ceases to be profitable when the payback period for the capital equipment exceeds the time period over which the capital equipment is used. Without some sort of correction to these trends, the consumer can look forward to higher prices, while the CMOS industry will undergo consolidation and slower growth.
Brian Lord, AmberWave System s director of corporate development, thinks that the strained Si technology being developed and licensed by AmberWave will be an important part of the solution needed to prevent this gloomy scenario (Compound Semiconductor September 2002). The higher mobility of carriers in a thin strained Si layer means that faster and/or lower power consumption devices can be manufactured without the need to shrink linewidths. "New materials are the answer to this problem," said Lord. "What the industry really needs is a step-function improvement in the trend line to reduce the fab payback period to less than a year. We need to move to a system where instead of the fab driving the performance of next-generation products, the materials - specifically engineered substrates - become the driver." (figure 1).
New materials have been a feature of new generations of CMOS processes in the past, but their introduction has been made necessary by shrinking feature sizes and more levels of interconnect. However, strained Si is different because it enables improvements in device performance without a reduction in feature size or huge capital cost increase. "The magic is in the wafer," said Lord. "Manufacturers can simply buy the strained Si epiwafers and process them on normal CMOS lines."
The semiconductor industry continues to be dominated by Si. According to IC Insights, III-V materials accounted for just 1.2% of the market in 2002, and SiGe had a 0.2% market share. The situation in 2007 will look very similar, which is perhaps surprising given the fanfare surrounding the emergence of SiGe and its perceived benefits (table 1). In 2007, the SiGe market will be worth about $1.5 billion, or 0.8% of the IC market, with III-Vs having 1.6% of the market (figure 2).
SiGe offers many of the performance characteristics of compound semiconductors, but at about the cost of Si CMOS, because standard CMOS lines can be used for processing. It also allows a previously unseen level of integration, with SiGe bipolar transistors for analog and RF functions being combined with digital CMOS logic on the same chip. This has resulted in a large number of manufacturers that now have SiGe BiCMOS processes.
SiGe has certainly displaced GaAs in a number of applications, and in some camps it is thought that SiGe will also displace GaAs from its stronghold, the cell phone PA. However, SiGe also faces a challenge from the inexorable march of CMOS. In his presentation entitled "Semiconductor Technologies for a Changing Wireless World", Mark Wilson, director of technology strategy at Motorola SPS, stressed that it would be CMOS that shapes the future of the SiGe versus GaAs race.
Wilson described the semiconductor breakdown of Motorola s i.250 GSM/GPRS platform. Here, the power management functions and baseband processor are implemented in CMOS, the front-end transceiver in SiGe:C BiCMOS and the PA in GaAs (with Si for the control ICs). Given that the PA is the only area where GaAs has an impact in this volume market, and the rumblings that SiGe could even displace GaAs here, it may provide some comfort to those with a vested interest in GaAs to hear Wilson s comments on the prospects for PA technologies. "I certainly believe that GaAs HBT or E-mode PHEMT technology will [continue to] play a part in the PA socket at least in the final stage," he said. "There is a good chance that SiGe BiCMOS could find its way at least into the predriver stages and certainly a BiCMOS IC can be used for power control within the PA module."
