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Amberwave And Purdue Team On III-V Integration

Former Bell Labs researcher Peide Ye heads up a new research effort to integrate III-V and silicon materials and develop commercial devices.

Strained-silicon pioneer Amberwave Systems is working with Purdue University under a new project aiming to integrate III-V and silicon materials in semiconductor devices.

"We have been working on III-V material technology for some time," said Amberwave CEO Richard Faubert. "This collaboration with Purdue will significantly enhance that development."

Heading up the new project is Peide Ye from Purdue s School of Electrical and Computer Engineering. Ye has experience in III-V MOSFET development and atomic layer deposition technology, and was previously at Bell Labs before moving to Agere Systems and then Purdue.

Ye said of the collaboration: "Amberwave not only brings a strong development capability with expertise in deposition and defectivity in mixed-material systems, but also an effective business development process with an ability to see results through to commercial use."

The Amberwave-Purdue project is one of a number currently working on III-V and silicon integration. The Sematech industry group is working on silicon alternatives for MOSFET channels, primarily germanium, while leading chip maker Freescale Semiconductor is actively developing GaAs-based MOSFETs (see related stories).

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